Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
I have a little problemwith a particular dynamic shape. I have a dynamic shape and is it assigned a net and still it is separated. What is the problem? Why don't they connect if they are on the same net?
Is it possible your same net - net spacing settings are affecting this? Check your constraints for same net to net spacings.
In reply to budnoel:
Didn't work....any ideeas?
In reply to Szabolcs88:
Any chance you can post a screen shot of what you're looking at?
I hope this helps....
The link doesn't work - Can you please attach the image to the forum posting using the Options tab when replying to the message.
In reply to mcatramb91:
Here is it. Thank you for the tip on how to put pictures here.
Do you have an anti copper line that is not displayed in that area? It will still affect the pour but you just wont see it.
The impossible we do straight away. Miracles take a little longer.
In reply to tmd63:
Did you discover what was causing this problem? Just curious.
Two things to check.
Is there a Route Keepout defined in that area which is causing the separation (turn all Route Keepout Layers)
Is there a shape void defined that is causing the separation. (Shape > Manual Void.... > Delete, select the shape and window over the separation to delete the void if it exists) Also running Delete Islands (Shape > Delete Islands) would create these types of shape voids if at one point you had two traces that ran thru the area to form an island in the shape.
Hope this help,Mike CatrambonePlexus Engineering Solutions
Go to Display - Color Visibility and turn on the Bound for the specific layer that has the issue. This is a good way to view the outer boundary of the shapes including any voids / islands that have been deleted.
In reply to steve:
After many aggonizing hours i have found the problem....Sadly it was an ORCAD PCB EDITOR bug of somekind..... i have opened it at work and there everything was ok...thank you for the tips