Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.
Verification Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
More Support Log In
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technology. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Though I am just trying to make a basic board with PBCEditor 15.7, I am having problems with thru-holes on my board. I am not sure if it is a padstack issue or somethign with the way I am defining the planes.
Thruhole Padstack (1.78 drill diameter):
BEGIN/INTERNAL/END: Pad: 2.78, Thermal: 2.78, Anti-pad: 3.5
In my layout, I create a plane on the Positive GND layer with Shape->Rectangle, set the class to Etch and subclass to GND, draw the rectangle, and associate it with the net Gnd.
My expectation is that Thermal Reliefs and Anti-pads will be drawn on the GND layer accordingly based on whether they connect or not... but it seems that all layers are getting Regular pads drawn. Am I doing something wrong when adding my Etch rectangle? I get many DRC errors and things just don't look right.
Thanks for any help,
From what I've seen, thermal and anti-pads (as defined in a padstack) are only used on Negative planes. Since you've got Positive planes (and if you have dynamic shapes), you can set the shape parameters on thru-hole pins to get your thermals.
In reply to Randy R:
Have you went into SETUP/Design Parameters and 'refreshed' your planes? If not, that might fix your issue.
Good day. Mitch
In reply to Cadpro2K:
Thanks for the advice guys, but I am still unable to get anything to work, using either positive or negative planes. The PCBEditor15.7 Documentation says what is stated below, whichseems to imply that it would automatically put in the right thing. But, this is not what I am seeing.
So, from what you are saying, it seems that if I want a pad that connects to the (negative) ground plane, if I define "circles" for the antipads, it should not connect them, correct? that is not what I am seeing. Can someone please walk me through or point me to a step-by-step example of how to actually design a thru-hole/via and plane for PCBEditor? It is my first design with this software, as is probably clear from all my questions.
"Standard Pad ShapesAllegro PCB Editor displays pads using standard geometric shapes. On the Layers tab of the Padstack Designer, you can choose from the pad types illustrated below in photoplots. Pad Type Description Graphic Displayed Regular Positive pads (black), with one of the following regular shapes: Null Circle Square Rectangle Oblong Octagon Thermal relief Used instead of regular pads to absorb heat conducted through connect lines. Thermal reliefs can be: A negative pad on a positive copper area (shape). The thermal relief may be plotted as a regular pad flash (circle) with two lines. A positive pad on an embedded metal layer that distributes a voltage, such as power or ground. Anti-pads Negative pads (clear, surrounded by black), usually a circle, to prevent connection of a pin to an embedded metal layer. ...Each pin can have all types of pads (regular, thermal relief, anti-pads, and custom shapes) defined on every ETCH layer of the design. For negative artwork layers, Allegro PCB Editor uses thermal reliefs and anti-pads. For positive artwork layers, Allegro PCB Editor uses just three regular pads. This means a pin can be put anywhere on the design, and Allegro PCB Editor photoplots the correct pad, whether the location is in an open area or inside a filled shape.Photoplot Pad DataWhen you create plots, Allegro PCB Editor uses the padstack information to write the photoplot pad data for a pin on a particular layer. Allegro PCB Editor determines the pad types for photoplotting as follows:How Allegro PCB Editor Determines Pad Types for Photoplotting
If the Pin Is... Uses Pad Type... * Not in a filled area on a layer being photoplotted, such as a shape or rectangle: Regular pad on positive artwork
* Inside a filled area on a layer being photoplotted and the pin shares the same net as the filled area:
A thermal relief pad created by positive artwork, or a thermal relief pad drawn by positive artwork ==========================================================
* Inside a filled area on a layer being photoplotted, but the pin does not share the same net as the filled area: An anti-pad created by positive and negative artwork
In reply to EllieRye:
Aha, figured it out (thanks to the first tip). I did not realize I need to change the shape to "dynamic". Now I did and both thermals and antipads work fine for positive plane layers.