I have the very same problem. see http://www.cadence.com/community/forums/T/25128.aspx
The calculated impedance is far from what it should be ...
In reply to tltoth:
What version and ISR level are you at? There were some updates related to impedance in some of the ISR's.
EMA Design Automation
In reply to BillZ:
Was at hot fix 38, updated to hot fix 40.
Issue still exists.
Note: Opened same database on 2 other computers, issue disappears. 1 computer is a windows based with hotfix 40 applied, other computer is a linix base at hotfix 17.
Could this be hardware (PC) related?
Opened a Sr, and the Cadence team does not see this issue.
Thanks for feedback
In reply to Wild:
If you are getting different results on different machines, try:
- deleting your local cache for the field solver (delete the file interconn.iml and then reopen the design)
- see if you have anything solver related in your env file (like trapezoidal_angle_in_degree)
In reply to Dennis Nagle:
Thanks for the reply:
The database is on a network drive, which I open from all 3 machines (2 windows based - 1 linix based).
I deleted the interconn.iml file in the network drive, made no differnce.
Where would the local chache be located? Doing a search on my local disc, lots of interconn.iml files......
Looks like you nailed it.
I had use_accurate_delay_calculation checked 9in the env file.
I unchecked it, drc disappeared, and parasitic now matches what sigxpoler predicts.
You're quite welcome.
It's usually the interconn.iml in the same directory as the board file.
By shutting off use_accurate_delay_calculation, you're assuming ideal reference planes.
The use_accurate_delay_calculation checkbox solved my problem too.(http://www.cadence.com/community/forums/T/25128.aspx)