Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
I'm trying to understand this symbol; I've examined SMD pins that are just top layer rectangular pads with an oversized mask; that makes sense. But why does this symbol have two vias on it? Just trying to understand the logic/rationale behind it.
Not sure... It's a strange looking symbol. It was done in an older version of OrCAD than I have, so it doesn't open up normally, anyway. It doesn't look like the vias connect to anything. Maybe the vias are used as some sort of alignment hole? I don't know. What kind of part is this supposed to fit? Most of the footprints included in OrCAD aren't identifiable, so I end up drawing my own.
That is one strange footprint, but then all 4 of the SMT parts that start with xxxxRF_ are odd. The vias are connected to the pads with traces. I am guessing that the the "rf" part of the name is shorthand for REFERENCE. My take is that the name decodes as a reference version (the rf) of an 0603 with vias (the wv) and the size of the via drill (the 12d). I did check the via and the pad stack calls for a 12 mil drill. I can't imagine trying to use that footprint for anything. Oh, my other guess is that the rf means it is intended for RF circuits but I find that highly unlikely. Like David, I create my own footprints. In my case I use an obsolete but still useful MIL-STD for my 2-contact parts. It takes into account the z-axis dimension to create a solder fillet that is at least 25% of the component height. As such I have separate footprints for resistors, capacitors, inductors and such. Using this standard allows for boards that pass severe Navy-level shock and vibration requirements. IPC-7351 appears to be oriented more toward consumer and light industrial markets and that is why I choose not to use it.
In some cases, librarians add fanout (pin escapes) to their library symbols to save time during layout and to have a more consistent component fanout in all locations.
My opinion is that the RF stands for Reflow (as the Reflow SMD Pads are sometimes different than the SMD Pads for the Wave solder process) and the WV stands for With Vias.
I have worked with several companies that had a very specific naming convention to identify footprints in the library and it is not uncommon to have different footprints based on the soldering process, spec build to IPC, MIL, etc. or different footprints with and without fanout. It is sometimes recommended to fanout off the side of discrete components (at the heel of the pads) vs fanout out the far edges (at the toe of the pads) as the electrical path to the metallization of the discrete component is closer when you fanout from the side which in turn makes the connection to the internal planes that much shorter.
My two cents,Mike Catrambone
Hi Guys, my 50 cents on this one.
It is an unusal symbol but i believe it was designed for use on a flex circuit.
0603 Resistor Flex with vias 12mil diameter hole.