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I have a design which has 7 layers. The top layer has only short stubs.
There are two layers for traces but they are sensitive signals and there is a solid ground plane above and below these two layers. I have connected these two planes at one point near the incoming supply. I also have a single ground plane as layer 7 which is noisy.
How do I connect a number of ground signals from Layer 1 to Layer 7 WITHOUT connecting to the other two ground planes, which would inject noise onto these planes?
When I try using the normal vias, they connect all planes from 1 to 7 and also 2 and 5, I just need layers 1 and 7 connected but they need to connect at the supply (one via connecting layers 1, 2, 5 and 7).
The impossible we do straight away. Miracles take a little longer.
You can do this one of two ways.
First method is to attach the no shape connect property to the individual vias you are working with and then manually connect them with clines to the layers you want them to connect to.
Second method would be to void an area, or put a route keepout, around the vias on the layers you do not want them to connect to.
Have you talked to your fabricator about a 7 layer design? Most PCBs are fabricated with an even balance of copper layers for cost reasons. I would suggest adding an 8th layer or making sure your design is at the proper cost target before doing an odd stackup count.
In reply to redwire:
My design is not a standard Glass Fibre/Epoxy design and yes, it is standard for my design fabrication to use odd and even layer counts.
#Chads108, Is there any way of adding the route keepout to a via (maybe give it a new name to separate the new via) instead of doing it for each via in the design?
In reply to ericchen:
Hello, You can do what you need by using voids on the inner layers but this is kind of a manual way of doing things.
A better way to handle these grounds is at the schematic level and pass the net information to the PCB editor.
On your schematic consider using different grounds "net names" example gnd, agnd, gnd1, gnd2 etc. The advantage is a plane in the pcb editor with the same net name will be a "Connect" and planes that do not have the same net name will have no connection to a via or pin.
From what you write it sounds like all your ground planes have the same net name ? hence the issue.
I've seen the requirement of a signal via (50 ohms) with ground vias adjacent to it. Ground via spacing was critical to the impedance. As a bonus, ground vias could only be connected to planes adjacent to the signal layer (ATE fixture.)
Would be a lot easier if we could add voids to the padstack. In the meantime, vias as netlist components? Painful but safe solution...
(Flashback to the early 90's when PCAD couldn't verify a netlist connection to a negative plane. This was our safety net.)
In reply to Robert Finley:
Gosh PCAD like voids... Man I rember those days..I dont believe the voids were needed in padstacks from ver 6 on as memory recalls as they made a bunch of good changes to the program back then.
Dont think vias as netlist components is viable.. EZ way is just break up your planes and associate those planes with specific nets.Then it does not matter what via is used. On a multi-layer design with positive inner planes the vias wont need voids if the netassigned to the via is different than the net assigned to the plane. The plane will get automaticly cleared for the via...
In Allegro I think it is better to use positive planes, easier to see connectivity.
In the old days people used negative planes to reduce the size of the artwork gerber output and also to speed up re-draws. Mainly theredraw speed of the graphics.. We got better graphics cards and faster PC's now so even on a large board a positive plane is a non issue..
That ATE test fixture sounded fun :)
In reply to ScottCad:
ScottCad wrote the following post at 12-13-2013 9:29 PM:
your schematic consider using different grounds "net names" example
gnd, agnd, gnd1, gnd2 etc. The advantage is a plane in the pcb editor
with the same net name will be a "Connect" and planes that do not have
the same net name will have no connection to a via or pin.
^^^ This is the solution.
Label your two grounds with differentnet names in the schematic. GND and AGND for example. Connect them with zero ohm resistors at the one point you want them to join.
Be very careful that you have a return path for the current to get into the GND pins of the chips at each end of the net.