I am using allegro pcb design L (legacy). After successfully creating a netlist in capture and importing it in allegro, I cant seem to see the ratsnests for my GND and VCC power nets. I can successfully change the color of the pins connected to the power nets using the process of changing the color of ratsnests but the ratsnests do not appear. Is there something wrong with my capture schematic or is there an option where I need to turn on power ratsnests?
In the command window type ratsnest this should pop up a dialog so you can verify the nets are enabled or not.
Also check that the specific rat for your power nets is a color you can see on the screen if other than the default.
One other thing to check is that the no rat property is not applied to your ground or power pins. The no rat properity will
hide the net on a pin basis
By default, power nets will get a POWER_and_GROUND schedule which means the unconnected pins will display a box with a 'X' for the ratsnest. Alternatively you can check the net (Display -> Element) to see if the pwr/gnd nets have a NO_RAT property assigned to them.