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Hi, Gurus,I try to model de-emphasis feature by MacroModel. PCI-E design kit is a good reference for us. I found there are some description in the kit.
.param eqf='1.0 - (10.0 ^ (adj/20.0))'
.param cf1='cf0 * eqf'I don't really understand the first one and second one. 0.58 is a very strange factor. Pls give me a hand, thank you in advance.Sogo Hsu,Foxconn
Hi Sogo,The parameter "eqf" converts the PCIe spec de-emphasis expressed in dB (normally "eqdb") into a simple coefficient (cf) multiplier operating on the behavioral transistor size lower in the model. The parameter "adj" is an "adjustment" (fudge) factor to adjust for the fact that "eqdb" did not have the expected affect. As such, the 0.58 was derived experimentally by coding the model to adequately represent the behaviors in the spec.Make sense?Hope that helps,Donald
Hi Donald,Thank you for your response. I got it. It seems a tedious iteration process for adjusting the behavior is necessary, is it? In addition, I tried to shorten the rising/falling time by reducing the dT value in 'output section'. However, it is in vain. The minimum rising/falling time in PCB SI is about 40~50ps for 20-80%. My target is 30ps. Do you have any comment on it? Thank you for your helps in advance.Sogo Hsu,Foxconn
Sogo,There's a couple versions of the SerDes macromodel around. The ones that enter cf as a fraction of the base driver work as you'd expect. adj only exists in the base model that allows you to enter de-emphasis in dB. There's some problem in the way the math and logarithm is undone, which I've never figured out. Either way, I prefer to enter cf directly anyhow.Regarding the edge speed, I've never seen a limit on dt and think it should go down to whatever you want. It's possible you have capacitance in there that won't allow it to slew as fast as you want. But dt has no lower limit I'm aware of.Hope that helps,Donald