Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
what is Pgen,what is IntelliGen........????
In IntelliGen, once generation of me begins, this process can be invoked for fields that are notdescendants of me before calling me.post_generate(), in order to generate fields in an order that suitsthe user-defined constraints. (In Pgen, once generation of me begins, this process is only invoked fordescendant fields of me before me.post_generate() is called.)
how to understand this sentence???? (from sn_igenuser)
Pgen is the old Specman constraint solver, and IntelliGen is the new one. Until version 10.2 youneed to select IntelliGen using a config flag (set_config(gen,default_generator,IntelliGen) before youload you code. Starting with 11.1, IntelliGen will be the default solver, so you only need to changethe config if you want to use the old one (Pgen).
The big difference (which you have already worked out) between Pgen and IntelliGen is that inPgen the solver looks at one field at the time. In IntelliGen all fields (no matter in which point ofthe environment hierarchy they are) which are related via constraints are solved together. Doing socan modify the order in which postand pre_generate() are called (this is what is described in theuser guide).
It appears that you have many questions on the generator (there are some other posts from you).Maybe it would be helpful to get in touch with Cadence and try to arrange some on-site supportfor a couple of hours with a local AE to solve your issues.