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I always use ncvlog –sv –f file_list to compile the SystemVerilog file in file_list.
But sometimes, my RTL code is Verilog2001 compatible and my TB code is SystemVerilog compatible.
Can I compile SystemVerilog and Verilog separately?
Hi Davy.You could use two ncvlog commands, one for the RTL files and one for the SV files.If for some reason you must compile everything in one command, then there is a useful trick that you can do.The SV LRM defines two pragmas to control the SV parser - one pragma turns off the SV keywords and the other turns them back on.If you put these pragmas into two files, you can import them in your file_list file surrounding the RTL (non-SV) files.// keywords_2001.v‘begin_keywords "1364-2001"// end_keywords.v‘end_keywords// file_list// starts in SV modekeywords_2001.v // now in v2001 (no SV keywords) my_rtl_dut.vend_keywords.v // now back to SV mode my_testbench.svCompile with: ncvlog -sv -f file_listSteve.
Hi Steve,Thanks a lot!And can you tell me how to use two ncvlog commands, one for the RTL files and one for the SV files? Shall I use just one ncelab?Best regards,Davy
Hi Davy.It's always just one ncelab step, no matter how many ncvlog (or ncvhdl) steps precede it.For example:ncvlog -f rtl_files.fncvlog -sv -f tb_files.fncelab worklib.tb:moduleCheers.Steve.
Hi Steve,It seems the Cadence IUS583 don't support this feature very well.When I type in the file list as below:keywords_2001.v my_rtl_dut.v my_rtl_tb.svend_keywords.vThe IUS583 give out:ncvlog: *W,CDIEKW (./src/misc/end_keywords_2001.v,1|12): compiler directive `end_keywords found, but no earlier matching `begin_keywords [(SystemVerilog)].Thanks!Davy
Hi Davy.I built a small example and checked that it does work in IUS5.83p3.Please try this example, and compare the provided ncvlog.log file.Regards.Steve.
Ignore that the log file shows IUS5.7, the result is the same in 5.83, I just didn't save the right log file! :-)
Hi Steve,Thanks a lot! It does work under IUS583. But can I add two file between keywords_2001.v and end_keywords.v like the example I give out in previous post? Or I have to encapsulate all Verilog 2001 file with keywords_2001.v and end_keywords.v one by one?For example, can I do this,// files.fkeywords_2001.vmy_rtl_dut1.vmy_rtl_dut2.vend_keywords.vOr Shall I do this,// files.fkeywords_2001.vmy_rtl_dut1.vend_keywords.vkeywords_2001.vmy_rtl_dut2.vend_keywords.vBest regards,Davy
Hi Steve,Sorry, I have make a mistake before and give out a wrong result.I checked it again. It seems all the two style I listed above work in IUS583!Thanks a lot!Best regards,Davy