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When we design a circuit schematic, a netlist is
generated by Cadence automatically.
Is it possible to go other way
round? I mean, if we write a netlist file on our own using OCEAN and
then running it?
Secondly, if we already have a netlist file and
we want to edit it, let's say we want to add a couple of more
transistors, does Cadence allow that?
For the first part, you can use:
design("libName" "cellName" "viewName")
and provided you're running in icfb/icms etc (not "ocean") in IC5141, although in IC61X "ocean" is OK, it will automatically netlist the design. You can also use the createNetlist() function for creating a netlist if you need to.
For the second question, yes, you can. The filename needs to be called "netlist" (I think), and you need to have files alongside called netlistHeader and netlistFooter (these can be empty though). Then use:
it will then assemble the input.scs (if using spectre) based on the netlist you've provided, plus the analyses that you've defined with analysis() etc.