Modern wireless systems operating under 5G NR and emerging 6G waveforms place extreme demands on RF power amplifiers (PAs). Driven close to saturation for efficiency, these devices introduce nonlinear distortion that degrades spectral compliance, EVM, and overall system performance. To address this challenge, Digital Predistortion (DPD) has become a critical system‑level linearization technique.

AWR Microwave Office (MWO), tightly integrated with Visual System Simulator (VSS), provides a powerful environment for system‑level DPD analysis using realistic nonlinear PA implementations. This unified workflow enables designers to evaluate linearization strategies under accurate RF and communication‑signal conditions early and with confidence.

Why System‑Level DPD Analysis Matters

Traditional RF design flows often analyze PAs in isolation, detached from real communication waveforms and system impairments. However, DPD performance strongly depends on:

• Modulation bandwidth and PAPR
• Memory effects in the PA
• Feedback accuracy and solver convergence
• Interaction between RF and baseband domains

By combining circuit‑level PA models in MWO with communication‑level simulations in VSS, designers can directly assess how nonlinear devices behave in real system conditions before hardware validation.

Digital Predistortion Testbench Overview

Figure 1: Closed‑loop DPD testbench integrating OFDM stimulus and nonlinear PA circuit

The DPD demonstration uses a VSS‑based system‑level testbench driven by a realistic OFDM waveform configured for multiuser operation. The signal chain includes:

• OFDM source in VSS
• Driver amplifier
• Nonlinear power amplifier implemented as a Microwave Office circuit schematic
• Closed‑loop DPD block using feedback from the PA output

This approach enables seamless co-simulation of RF circuits and digital signal‑processing algorithms within a single environment.

Supported DPD Models and Solvers

The DPD block in VSS supports several industry‑proven algorithms suitable for wideband 5G signals:

DPD Models

• Memory Polynomial (MP)
• Dynamic Deviation Reduction - second order (DDR2)
• Generalized Memory Polynomial (GMP)
• Lookup Table (LUT)-based DPD

These models capture both static nonlinearity and memory effects, which are essential for accurate linearization of modern broadband PAs.

Solvers

• Least‑squares
• Damped Newton
• Damped Newton with step reduction

For LUT‑based DPD, the table is generated automatically, simplifying model setup and convergence.

Closed‑Loop Operation with Real PA Behavior

The DPD block operates in a true closed loop:

• The forward path signal and feedback signal from the PA output are used for coefficient extraction.
• Initial model training and incremental updates occur during simulation.
• No explicit delay element is required in the feedback path, as the loop delay is internally managed by the DPD block.

Because the PA is implemented as a nonlinear circuit schematic in Microwave Office, the DPD operates on realistic device behavior rather than idealized behavioral blocks.

DPD Characterization Results

System‑level results clearly demonstrate the effectiveness of DPD when applied to realistic RF circuits:

• Reduced spectral regrowth, improving adjacent‑channel performance.

Figure 2: PA output spectrum showing reduced spectral regrowth with DPD enabled

• Cleaner IQ constellation, indicating improved EVM.

Figure 3: Improved IQ constellation with DPD, indicating reduced EVM

• Improved CCDF characteristics, reducing peak power excursions.

Figure 4: CCDF comparison shows reduced peak power excursions with DPD

Direct comparison of PA performance with and without DPD provides immediate insight into linearization effectiveness under wideband OFDM excitation.

Why AWR MWO and VSS Transforms RF System-Level Analysis

By unifying RF circuit simulation and communication‑system analysis, the AWR/VSS platform enables:

• Early validation of DPD strategies using realistic PA circuit implementations.
• Faster design iterations by eliminating disconnected RF and system simulation flows.
• Greater confidence in system‑level performance before hardware validation.

Designers can apply realistic modulation, observe spectral and constellation metrics, and optimize PA behavior in the same workflow without tool handoffs.