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Noise analysis on dynamic comparator

minci
minci over 14 years ago

 Hi,there

I am using  cadence IC5141 usr6 and MMSIM72.

I want to know the noise performance of my circuit,a dynmic comparator contains a pre-amp followed by latch.

I select noise analysis in ADE,sweep the frequecny from 1 to 10G,output noise I choose voltage,and select Pos.&Neg. differential output respectively.Then I am confusing about Input noise.Since my input is differential also and there is only one selection,I dont know how to do and just select one vdc source out of two.

The result is so weried,the input-referred noise is so big that is 1.3e+13.

I believe I have made some falses but I dont know where.And I try to find the simulation method in spectre manual but only to find nothing valuable about noise analysis.

I wonder whether noise analysis could be used for dynamic comparator,or just for linear op-amp? If not,how to simulate the noise of dynamic comparator where there are some switches during its operation?

 

Best regards

urian

 

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  • LKQLKQ
    LKQLKQ over 9 years ago
    uh~ I have the same problem on the analysis of the noise of dynamic comparator!
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  • Andrew Beckett
    Andrew Beckett over 9 years ago

    Analysing the noise of a dynamic comparator can't be done with a time-invariant analysis like noise. You need to use pss/pnoise - in particular in time-domain mode. There is an example of doing this in the ADC Verification Workshop at 

    Regards,

    Andrew.

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  • maurocleris
    maurocleris over 8 years ago
    Hello Andrew,

    at the link you mention I cannot find anything...could you give another link with valuable examples?
    Many thanks.

    Mauro
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  • Andrew Beckett
    Andrew Beckett over 8 years ago

    Hi Mauro,

    The way that Rapid Adoption Kits are stored on Cadence Online Support has changed to be a bit more like the rest of the regular content, and because of that the URL no longer works. You can easily get to them by going to support.cadence.com and then Resources->Rapid Adoption Kits and then searching within the Rapid Adoption Kits for "ADC Verification". This should take you to this URL:

    ADC Verification Workshop

    Regards,

    Andrew.

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  • maurocleris
    maurocleris over 8 years ago
    Hello Andrew,

    very nice tutorial, many thanks for the new link.

    I tried to apply a pss/pnoise Analysis in order to find out the noise of my Clocked Comparator following the instructions given
    at page 51 and following and it seemed to me that everything was quite clear.

    1. Apply a small DC input voltage to comparator (1mV differential) and clock the comparator
    2. Setup Shooting Newton analysis to calculate the periodic operating point
    3. Use sample periodic noise analysis with the sample point determined by the differential output levels (internal latching nodes) of the comparator
    4. Set the sampling point to where the comparator differential output levels are separated by about 50mV
    5. Integrate squared noise of sampler output and take square root to find rms noise on ideal sampler from DC to Nyquist frequency
    6. Divide noise by gain from input to sampler output (50mV/1mV)

    I selected in the pnoise form --> noise type ´´jitter´´ and threshold value 10m, crossing direction ´´rise´´.

    It is verified on simulation results that the noise Analysis is done at this crossing Point, so it seems everything coherent and clear.


    But...when I change the threshold value to 50m, 100m, 200m I obtain totally different values for the noise.

    I apply a differential Input of 1mV at the Input of the comparator and, at the end (like suggested in step 6) I divide the integrated squared noise by the gain factor of 10, 50, 100, 200. Results of rms noise for the different cases are:

    Threeshod voltage - rms noise
    10mV 3.2mV
    50mV 975uV
    100mV 399uV
    200mV 157uV

    I cannot understand this variation...
    Overmore, I simulated the comparator noise in the time Domain (transient+noise) obtaining a Sigma_rms_noise=350uV.
    I am pretty sure that this second Simulation is good, unlucky it requires a lot of time and I would prefer a faster way to Support Long and painful design sessions.

    So, how to get correct results from pss/pnoise Analysis (it is evident that I am doing something wrong) and I have no idea how to proceed.

    Many thanks in advance for your help.

    Mauro
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  • antoniosouza
    antoniosouza over 6 years ago in reply to maurocleris

    Hi,

    I have exactly the same problem.

    Any update on this post ?

    Thanks a lot,

    Antonio

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  • Nicolas Callens
    Nicolas Callens over 6 years ago in reply to antoniosouza

    Should normally work. I have tested it for my dynamic comparator and when I am simulating for different thresholds, I am getting the nearly the same input-referred noise. Probably a wrong setting? Without seeing your testbench and ADE L setup, I cannot help you except by saying: try to do the same as described in the workshop.

    Kind regards,

    Nicolas

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  • ydawjee
    ydawjee over 5 years ago in reply to Andrew Beckett

    Hi Andrew,

    I had some questions regarding the setup for pnoise. In PSS it asks to add another tone at 1/2 sampling frequency. Why is this needed? Usually this would cause unnecessary foldback in periodic analysis. For example, in switched cap you use the clock frequency as beat frequency without any input tone.

    Looking forward to hear from you. Thanks!

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  • Andrew Beckett
    Andrew Beckett over 5 years ago in reply to ydawjee

    I've no idea why you would need to add another tone at 1/2 sampling frequency. It should be sufficient to just have the clock frequency, and then the sampled noise analysis allows you to sweep the frequency up to half the PSS fundamental (the sampling in the sampled noise analysis samples at the PSS fundamental rate, so it doesn't make sense to sweep beyond half the PSS fundamental). Do you have a source with that frequency in your circuit somewhere?

    Andrew.

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  • ydawjee
    ydawjee over 5 years ago in reply to Andrew Beckett

    Thanks for the prompt reply. No currently I only have one large signal is PSS and that comes from the clock used to drive the latched comparator. If I dont add that tone its hard to get same results with transient and pnoise. I have a 500uV DC input. I am having trouble matching the transient noise and pnoise results.

    If you look at the adc verification tutorial it asks to add this second tone manually in pss setup. It seems they do this to get same result as transient noise but I dont feel this is correct.

    A wild guess Do u think I have to measure the sampled gain using pac for getting input referred noise?

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