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  3. Modeling and simulation of FinFET in cadence

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Modeling and simulation of FinFET in cadence

RAJ JOHRI
RAJ JOHRI over 13 years ago

Hello. I m MTech student. I want to simulate FinFET based digital circuits. But I don't have a FinFET model in cadence. Please help me by providing an equivalent model of FinFET or any other way to simulate FinFET.

Thank You.

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  • Andrew Beckett
    Andrew Beckett over 13 years ago

    Wouldn't it make sense to get the model for  whatever process that the FinFET is expected to be produced in (even if this is for academic purposes, you presumably want some realistic model of the transistor) - so contacting a foundry would make sense...

    Andrew.

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  • berndf
    berndf over 13 years ago

    There is a predictive model page 'http://ptm.asu.edu/'
    form the Arizona State University.
    Have a look at the 'Latest Models' section.

    Bernd

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  • berndf
    berndf over 13 years ago

     Also http://www-device.eecs.berkeley.edu/bsim/?page=BSIMCMG

    could be a good place to dive into the topic.

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  • RAJ JOHRI
    RAJ JOHRI over 13 years ago
    Thank You for ur reply. I have downloaded the finfet model. Please tell me how to add it into cadence gpdk045 library.
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  • Chen23
    Chen23 over 11 years ago

     Hi. I am an Imperial student facing the same problem. I have downloaded the BSIM-CMG model. How did you add the FinFET model to Cadence library finally? I would be grateful if you could tell me.

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  • Andrew Beckett
    Andrew Beckett over 11 years ago

    You need to create a symbol, and then a stopping view, and CDF to netlist it properly. Some info on this can be found here. There's also some discussion in this post.

    Andrew.

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  • Chen23
    Chen23 over 11 years ago

     Thank you for your quick reply.

    It may be a silly question. After create the symbol view of the text (verilogA code) and make a copy of it and call the new view 'spectre', I don't know how to :

    Open the base CDF for the cell, add a component parameter called "model." according to the recipe given in your first hyperlink.

    Do I need to create a new cellview of a top level circuit and insert this symbol and then look at its property?

    Chen

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  • Andrew Beckett
    Andrew Beckett over 11 years ago

    Actually, it's a VerilogA view, you don't really need to do all of this because the CDF will get created automatically.

    However, given that bsimcmg is a built-in model nowadays, I'm not really sure why you need the VerilogA model in the first place?

    Perhaps you can point me to what it is you've downloaded so that I can take a look (may not be today, because I have a lot of things to do in my day job as well as a big backlog of questions on the forums).

    Andrew.

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  • Chen23
    Chen23 over 11 years ago

    I downloaded the model from this page:

    http://www-device.eecs.berkeley.edu/bsim/?page=BSIMCMG_LR

    I am a student doing my project using college computers. And everytime I use Cadence, I type 'ic6 gpdk18' in the terminal. I don't know if my Cadence version is too old or not. I cannot find the bsimcmg model in the library (analogLib, basic and gpdk180). The only one I found is bsim4 in analogLib but I need a model to simulate FinFETs. And it seems that I cannot update it because it is a college computer. So I decide to create this model by myself.

    The model I downloaded gives a symbol with 4 pins (s, d, g, e). It seems that the parameter settings are done in the .sp test file (such as L and NFIN)  in the file 'Benchmark_test'. So I don't know how to change them in Cadence.

    Sure it's OK and you can take a look at anytime. Thank you very much for the help.

    Chen

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  • Andrew Beckett
    Andrew Beckett over 11 years ago

    Chen,

    As I pointed out in one of those posts, there is no standard finfet symbol in analogLib. There certainly wouldn't be in a 0.18u generic PDK, since FinFETs are typically only used in technologies around 20nm or smaller (so a factor of 9 or more smaller, so that's quite  a few years in Moore's Law terms!).

    So you'd have to create one. You could 

    Spectre itself supports "bsimcmg" built-in. If in a UNIX shell, you run "spectre -h bsimcmg" you'll see the info about this. Typing "spectre -W" will show you the subversion you have available. The bsimcmg model was added in MMSIM72, and since then newer versions in MMSIM101, MMSIM111, MMSIM121 and MMSIM131 (so it's in the last 5 major releases). I see no reason to use the VerilogA model.

    You'd have to create a model file using relevant model parameters for bsimcmg. So for example:

    model nfinfet bsimcmg type=n l=20n d=40n tfin=15n

    (probably many more - you may be able to get some idea from the test files - I didn't look).

    You could copy an nmos4 component from analogLib to your own library, and change the B terminal on the symbol to be "E", and then copy the symbol to the spectre view.

    Then use Tools->CDF->Edit CDF, set the CDF type to Base, and then pick your new component. You'll need to add some relevant instance parameters in the CDF - many of those for nmos4 won't be relevant. You can see available parameters from the instance parameters section of "spectre -h bsimcmg". You may not want to bother with all of them, because that's a pain and many are probably irrelevant for your needs. Then in the CDF simulation information you'll have to get the termOrder right to reflect the "E" pin rather than a "B" pin, and also make sure you list all the instance parameters you want to netlist.

    You may also want to set the model paramater name to whatever you called the model name in the model statement (shown above).

    Then you'd need to include the model file in ADE via Setup->Model Libraries in ADE (ideally give the file a ".scs" suffix if it is in spectre syntax).

    Something like that...

    Regards,

    Andrew.

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