Continuous & Discrete-Time behaviour of a Switched-Cap. Integrator circuit

Dear guys,

I would have the following question at the end of this text.

Since I have read that Andrew Beckett also seems to have extremely profound experiecne  here (e.g. topic "custom-ic-design/48795/noise-figure-of-track-and-hold-circuit"), I have the little hope now, that, if I try it here, he or someone could bring a little bit of light into this to me unclear topic.

Many thanks in advance for that!

I also posted my question in the forum “designers-guide.org/.../YaBB.pl (Moderator edit - DG post is here: https://designers-guide.org/forum/YaBB.pl?num=1636713101 ) which also helped me further (many thanks again to Ken Kundert), but on this point now I am stuck. I furthermore posted it on "">electronics.stackexchange.com/.../612337" but also there without success. Hopefully one of you guys might have a good (= intuitive, explaining, not 10 pages of equations, pls.) answer.

To the topic itself: Before starting the question, I have to bring everyone to a common understanding and so, I need to develop it a bit first and make some statements.

I tried to be as precise and short as possible, but as long as necessary.

#1) A Zero-Order-Hold (“ZOH”) (Sample & Hold “S&H”) block stand-alone:

First, we watch the Bode plot for this block stand-alone (s=j*2*pi*f ; Ts=sample time). We notice:

*) The envelope of the transfer-function goes “DOWN” (with -20dB/dec).

*) The nulls go down to –INFINITY (only because of resolution, not as much in this graph).

*) At half the sampling frequency “fs/2”, in this example 500 Hz, the magnitude is down by approx. -4 dB.

I compared the Bode diagram of this ZOH above, to the “_SAMPLE_ & Hold (S&H)” from Ken Kundert (“sqrt( (sinc(f*Ts)).^2 );” f=frequency). The result: The MAGNITUDES are completely IDENTICAL (proof not shown here). However, the phase information from Kundert's S&H is missing ( = constantly 0°). => As a result, I say: “Approx., a ZOH = S&H”.

#2) Reference circuit to be modelled: A switched-cap (SC.) integrator:

The following circuit shall be my reference, which I want to model with Matlab at a later stage: It shows a (parasitic-sensitive), lossy switched-cap. integrator, operated at sampling frequency fs = 1 kHz. As input stimulus, I put an AC source with 1V magnitude. (I thought about replacing the schematic details just by the block diagram, but maybe the details are important, it is often the case to know what was done _exactly_!)

To obtain the following Bode plot, I do the “PAC sampled” analysis (at rising edge) in the Cadence SpectreRF simulator, since I am interested in its Discrete-Time (DT) behaviour:

We notice:

*) As requested by theory, the DT (Discrete-Time) answer of the sampled output node of the circuit is symmetrical around fs/2 (500 Hz), at fs (=1kHz), the magnitude goes up again to the DC value (+80 dBV). (If one would do a linear frequency axis plot, one would see the symmetry around fs/2 better.)

*) So the “nulls” at multiples of fs go up only to the DC gain of +80 dBV, not to +infinity. (Because of resolution some are not even reaching +80 dBV, but this is an artefact I have understood and shall not be a topic for further discussion here.)

*) At fs/2 at 500 Hz, the magnitude is -6 dBV.

So far, so good.

#3) Try: Matlab model of integrator from #1  …

#3a) ... try model over Discrete-Time (DT):

Everything here is clear and there is no question from my side. I just wanted to list it for completeness. So if I model over the following Matlab commands “z=exp(j*w*Ts);   Aol=10000;   f=1-1/Aol;   Int_z=-z^-0.5/(1-z^-1*f);”, I get the following bode plot which is fine and exactly what I expected.

We see from the above cyan graph that at fs/2, we also get -6 dBV, further, it is symmetrical around fs/2 (500 Hz) and so, at fs (1 kHz), the magnitude gets up to +80 dBV again.

So far, so good.

#3b) ... try model over Continuous-Time (CT) with subsequent sampling:

Now I would like to model the real circuit from #2 over a CT model with subsequent sampling applied.

Because then, it allows me to also model the speed limit of the opamp for instance (and for more reasons (noise)).

I expect the same results as from the SpectreRF simulator (shown in #2 in green color) if I sample the CT integrator output afterwards with a Sample&Hold (ZOH, shown in #1).

We see from below graph:

*) The pink curve shows the Matlab model of the CT integrator (reaching -10 dBV at fs/2).

*) The blue curve shows the Matlab model of the CT integrator DIVIDED     subsequently by the ZOH from #1.

*) The red  curve shows the Matlab model of the CT integrator MULTIPLIED subsequently by the ZOH from #1.

We further notice:

If we DIVIDE the CT response (pink) of the Matlab model by the S&H (ZOH, orange, see #1) transfer-function, we get the blue curve. Doing so, yields:

*) A PERFECT match at fs/2 at least of the Matlab model (blue) to the DT response of the Cadence circuit (green): The -10 dB from the pink DIVIDED by the ZOH (thus +4dB), gives together the blue curve, which has also the -6 dBV at fs/2. So from this point of view, the procedure, what I do, is good ( = divide the CT tf. by the ZOH).

*) However, what is not matching so well, is, that the result is not completely symmetrical around fs/2. Ok, the “nulls” at multiples of fs go up also here, but not just to the DC gain limit of +80 dBV, but to theoretically +infinity (since the ZOH from #1 shows -infinity nulls). So from this point of view, the procedure, what I do, is not so good.

#4) Questions:

Now, there come my 2 questions:

If I try to model the real Cadence switched-cap. (SC.) integrator circuit (in green color from #2) by a Continuous-Time (CT) integrator Matlab model (in “s”) (in #3b) which is then sampled by a ZOH (S&H) to get the DT response:

Q1 ==> Why the hell it seems I have to DIVIDE by the ZOH (S&H) transfer-function and NOT to MULTIPLY by it to get somehow matching results (blue curve) to the Cadence SC circuit (green)??

To account equivalently for the “_SAMPLED” option of the Cadence PAC analysis in the real circuit, also in this model, for me, this means (maybe I am wrong here??) I logically would have to subsequently MULTIPLY the integrator output by the S&H transfer function. This is my interpretation, because the strange thing is (= above question), obviously, I have to DIVIDE the integrator output by the ZOH transfer function, and not to multiply by it in order that the “nulls” go also up, and not down, as in the S&H stand-alone case. Then the Bode diagram of this result (blue color) matches approx. the real Cadence SC. circuit (green), apart from the nulls going up higher than just to the +80 dB DC gain limit, as said. Of course, then, there is no symmetry around fs/2 anymore (ok, I also probably do not have a DT signal which is valid only at 1/fs time points but still a CT signal whose value is held constant until the next point in time). So,

Q2 ==> Which mathematical operation I do have to for the CT Matlab model in order to also get out the DT response ?? Just sampling (with the S&H or ZOH) seems to be too less!

Thanks for any hint in advance,

bernd2700