Stats

  • Locked Locked
  • Replies 4
  • Subscribers 143
  • Views 15767
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Does anybody know how to build my own PDK ?

alexyu

As a custom i am not very satisfy with foundry provide PDK, I want to do some customization, using different transistor geometry and different device model,  Does anybody know how to build my own PDK  based on foundry process ?  Until now I know, several component are required , parameterized cell builded using skill language, device model , does any body know what other requirement  do i need? and how to put them together ?

  • Building a PDK from scratch can be quite a lot of work. You need to do:

    1. Create the technology file - describing all layers, stream mappings, colour packet information, vias, layer properties (constraints in IC61-based releases) and some tool-specific information (such as data for Virtuoso XL - mostly for IC5141-based releases).
    2. Symbols for each primitive component, and stopping views for each supported simulator
    3. CDF for each primitive component, describing each of the supported parameters, and also how to netlist each component to each simulator that you are supporting.
    4. pcells - probably created using SKILL - to build the parameterized layout for each of your primitive component.
    5. Device models - transistor level simulation models
    6. DRC decks (you may be able to use the foundry-supplied rules files)
    7. LVS decks (extraction of the primitive devices and connectivity). Even if you have this from the foundry, it probably won't extract your devices that you've created in the PDK. So you'll need to code for this.
    8. Parastic Extraction - you'll probably need to also set this up to work with your primitive devices, so that you can create extracted views using those devices.
    9. VAVO/VAEO current density information (if using this)

    If you have no experience of this, you may be better off talking to somebody who does - for example, Cadence Services.

    Regards,

    Andrew.

  • Hi: Andrew

     Thank you for your reply.  Now how to build following item:

         2 .Symbols for each primitive component, and stopping views for each supported simulator

         3. CDF for each primitive component, describing each of the supported parameters, and also how to netlist each component to each simulator that you are supporting.

     Do you know?

    Regards,

    Alex_yu

  • Hi Alex_yu,

    The symbols are often copied from those in analogLib; same for the stopping views. This may be automated using the SKILL function dbCopyCellView().

    The CDF is also often based on similar components in analogLib - but in practice the precise parameters will depend on both the device models and the parameters for your pcell. A good way to start is to use the cdfDump() function to dump the CDF from an existing component, and then you'll get the SKILL code needed to build the CDF - you can develop it from there to fit your needs.

    Regards,

    Andrew.

  • Hi Andrew,

       Thanks for your help.  I will follow your suggestion for next few days.

     

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.