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PCELL's and warPCELL's

Patrick1982

Hi Everyone,

 I'm currently working on some pcells with Cadence.  I am using standard IBM pcells and I am using the "Inherited Parameters" option i.e. I am using a resistor and I am inheriting the Width and Length, and I am caliing them resW and resL, respectively and these are set as a "string".  The problem I am having (and I'm sure there is a simple answer to this) is I want to use the parameters resW and resL in a stretch command but I am getting the following warning:

 *WARNING* ("dbCreateParamInst" 62 t nil ("*Error* dbCreateParamInst: Invalid string" 17.92))

Does anyone know how to fix this?

 Also, does anyone have any information on warPCELLS?  I am currently using Cadence 5.1.4 but I will hopefully be migrating to 6.1 shortly, in the prvious company they were just rolling out 6.1 and I was led to believe that warPCELLS were already setup or very easy to setup, so any information on pcells for either versions with be great.

 

Thanks very much,

Patrick

Parents

  • Hi Lawrence,

    Thanks for your quick response, lets hope I can explain thing a little better this time.

     Inherited parameters:  In my Cadence layout, from the drop down menus I select Tools -> Pcell, this sets my layout to be a pcell and I get another drop down menu called Pcell.  From this menu I can select and define my inherited parameters on a selected instance.  And at the moment I have inherited the Width and Length parameters from a resistor and called them resW and resL. I want to add some Vias to each side of the resistor and I want to stretch these Vias when I modify the resL but with I try defining the stretch using this parameter I get the warning above. Does this make more sense?

     As for the warPcells, maybe this was something internal to the last company I worked for, I will have to try to look into a bit further.

    Thanks,

    Patrick

Reply

  • Hi Lawrence,

    Thanks for your quick response, lets hope I can explain thing a little better this time.

     Inherited parameters:  In my Cadence layout, from the drop down menus I select Tools -> Pcell, this sets my layout to be a pcell and I get another drop down menu called Pcell.  From this menu I can select and define my inherited parameters on a selected instance.  And at the moment I have inherited the Width and Length parameters from a resistor and called them resW and resL. I want to add some Vias to each side of the resistor and I want to stretch these Vias when I modify the resL but with I try defining the stretch using this parameter I get the warning above. Does this make more sense?

     As for the warPcells, maybe this was something internal to the last company I worked for, I will have to try to look into a bit further.

    Thanks,

    Patrick

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