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For LVS, how to include initiate a "spice netlist" into a schematic?

Hi,

This is just for LVS purpose (by Calibre), and Calibre LVS uses auCdl to generate the netlist.

I have a schematic that includes several subckts. For some of the subckts, they are standard cells provided by the 3rd party, I have only the spice netlist, no the schematic.

My question is: how to include these subckt spice netlist so that Virtusoso can generate (by auCdl) the overall netlist for LVS?

I use IC51.

Thank you !!

Andrew Beckett over 13 years ago

You can use File->Import->CDL to import a CDL netlist (usually that's what is provided for standard cells so they can by verified with LVS). This is much better in IC61, but in IC5141 can still be used. It's documented in <ICinstDir>/doc/transref/transref.pdf
Andrew.
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Quek over 13 years ago

Hi SUEE

In addition to Andrew's suggestion of importing the cdl netlist as a schematic, you can also try COS solution 11164856 (auCdl : Can automatically include cdl netlists of blocks used in my schematic).

Best regards
Quek
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