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creating a schematic file from a netlist file

SrinivasaL

Hi,

I am looking to create a skill program which could generate a schematic file from a given netlist file(present in text format).

netlist will be more of digital gate instances connected together.

Does anyone have idea or process how it can be done? A sample code would be great help.

 

Thanks,

Srinivasa

Parents

  •  I haveaccidently deleted my schematic File (sch.cdb) but i have the netlist file 

     I tried to use File->Import->CDL In

    I dont know exactly how to do it ........But i tried and i didnt specify any thing in Parameter File and Device map File

    I got ni.log files Which was as below

     
    ############################################

    Reference Libraries...
    AKASH_JOSHI
    UMC_18_CMOS
    basic
    analogLib
    avTech
    AKASH_JOSHI
    ###################################

    0 subckt(s) found in the netlist file.

     

     TOTAL CELLS #: 0



           *************************     
           ******   SUMMARY   ******     
           *************************     



        CELL                           TERMINAL #    NET #      INSTANCE #    
      -----------------------------------------------------------------------------
    home/anita/simulation/GRO_TDC/spectre/schematic/netlist INPUT

      CIRCUIT FILE INPUT AND PROCESSED
    *WARNING* LIB mtech11 from File /home/anita/umc_work/cds.lib Line 5 redefines
    LIB mtech11 from the same file (defined earlier.)
    *WARNING* The directory: '/home/anita/umc_work/mtech11' does not exist
        but was defined in libFile '/home/anita/umc_work/cds.lib' for Lib 'mtech11'.
    *WARNING* The directory: '/home/anita/cad_work/umc_work/my_lib' does not exist
        but was defined in libFile '/home/anita/umc_work/cds.lib' for Lib 'my_lib'.
    What do i do...........or any you suggest any better way

    pl help

     

Reply

  •  I haveaccidently deleted my schematic File (sch.cdb) but i have the netlist file 

     I tried to use File->Import->CDL In

    I dont know exactly how to do it ........But i tried and i didnt specify any thing in Parameter File and Device map File

    I got ni.log files Which was as below

     
    ############################################

    Reference Libraries...
    AKASH_JOSHI
    UMC_18_CMOS
    basic
    analogLib
    avTech
    AKASH_JOSHI
    ###################################

    0 subckt(s) found in the netlist file.

     

     TOTAL CELLS #: 0



           *************************     
           ******   SUMMARY   ******     
           *************************     



        CELL                           TERMINAL #    NET #      INSTANCE #    
      -----------------------------------------------------------------------------
    home/anita/simulation/GRO_TDC/spectre/schematic/netlist INPUT

      CIRCUIT FILE INPUT AND PROCESSED
    *WARNING* LIB mtech11 from File /home/anita/umc_work/cds.lib Line 5 redefines
    LIB mtech11 from the same file (defined earlier.)
    *WARNING* The directory: '/home/anita/umc_work/mtech11' does not exist
        but was defined in libFile '/home/anita/umc_work/cds.lib' for Lib 'mtech11'.
    *WARNING* The directory: '/home/anita/cad_work/umc_work/my_lib' does not exist
        but was defined in libFile '/home/anita/umc_work/cds.lib' for Lib 'my_lib'.
    What do i do...........or any you suggest any better way

    pl help

     

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