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How to reach "analog" signals at higher/lower hierarchy using VerilogAms?

yayla

 Hi,

I am runnig simulations on Ams simulator under  ADE with some behavioral modesl. I want to reach some higher/lower cells' "analog" signals.

Let me give an example:

I have behavioral models for Top Cell:PLL  and lower cells like PFD and VCO. I want to reach some analog signals of VCO from PFD. I have tried  "PLL.VCO.Vctrl' inside PFD model( I have also tried instance name rather than module name) but it doesn't work in VerilogAms. I have also tried to reach some digital signals but there seems no problem for those. Vctrl is an electrical which means continuous. Do you know how to reach continuous domain signals hierarchically?

 

 My environment info:

o IC 5.10.41.500.6.143.

 Regards,

 yayla.

  •  Actually, let me correct sth. Since Vctrl is electrical signal, I am using "V(Vctrl)" to reach the signal. I have tried to reach signal both inside "analog begin" and "always begin" block but I couldn't.

     Regards,

    yayla

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