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help on Generation of Schematic from Netlist.

Sarvani

Hi all,

         I have netlists for running LVS. How can I convert it into Schematics? My version is IC.6145. I have got following error in log file when I run Import~>Verilog... 

 ncvlog: *W,DLNOHV: Unable to find an 'hdl.var' file to load in.
TOOL:   ncvlog  09.20-s026: Started on Jun 26, 2011 at 14:57:33 IST
ncvlog
    -use5x
    -work __nclib
    -view module
    -logfile ncvlog.log
    -cdslib /tmp/ihdl_cdsliba2845_2845
    -messages
    -nostdout
    -nocopyright
    -ESCAPEDNAME
    bandgap.gds

file: bandgap.gds
.subckt bandgap AVSS AVDD OUT
|
ncvlog: *E,EXPMPA (bandgap.gds,1|0): expecting the keyword 'module', 'macromodule' or 'primitive'[A.1].
        Total errors/warnings found outside modules and primitives:
                errors: 1, warnings: 1
TOOL:   ncvlog  09.20-s026: Exiting on Jun 26, 2011 at 14:57:33 IST  (total: 00:00:00)

 And MY netlist format is following type:

.subckt bandgap AVSS AVDD OUT

M0 AVDD net13 net14 AVDD pmos w=600n l=130n

M1 AVSS net13 net14 AVSS nmos w=600n l=130n 

.ends bandgap

 

 Thankyou,

savrani

  • Andrew Beckett

    Savrani,

    Why are you trying to use Import->Verilog when you have a SPICE netlist not a Verilog netlist? Surely Import->SPICE would have been a more sensible choice.

    It's also rather confusing using the suffix ".gds" for a netlist - usually people would use that for a stream file (also known as GDSII format) file which is a binary file containing the layut. That's not your problem here, since the SPICE netlist language is rather different from the Verilog language, but thought I'd point it out nevertheless.

    Kind Regards,

    Andrew.

     

  • Sarvani

    You are right Andrew. I have followed what you suggested in last post. Now it works. Thank you very much Andrew.

    Thank you,

    sarvani

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