I just started cadence couple of days back for designing
my patterns, I wanted to subtract two layers and already wrote a code
but not sure its a right one or not. Could anyone help me please and let
me know is this a right on or not,
load("/usr/cdscad/libw/utils/rectw.il")procedure( subtraction( @optional origin ww tlength outlayer)(prog (xx yy np xo yo lw) subl1 = nil subl2 = nil xo = xCoord(origin) yo = yCoord(origin) ;; Draw First rect Layer xx = xo yy = yo-ww/2.0 r = rectw(xx yy tlength ww "metal1") subl1 = append(subl1, list(r));; Draw Second rect Layer xx = xo yy = yo-ww/2.0 r = rectw(xx yy tlength ww "metal2") subl2 = append(subl2, list(r))dbLayerAndNot((getEditRep) outlayer subl1 subl2))
Not sure what you're trying to do. Maybe you can give a brief description to let us understand your intension.
Else, just use function dbLayerAndNot is help.
First of all thanks for your reply, I think you are right that I didn't clearify the things in detail. I am designing the program first in Cadence. For that I am using icfb for compiling, gedit as a editor for writing my code and output of program can see in Virtuoso. Now as I mentioned the code in my previous post, actually I am creating two metal(polygon) layers on exactly same location (both layers x-axis and y-axis are same). Let suppose Layer1 and Layer2 has two layers on same location, obviously when my output come on Virtuoso I can see only one Layer but Layer1 and Layer2 should be behind it which I can't see because of same location. Now what I want is that I can subtract from Layer1 to Layer2 or vise versa so that when my output come on Vituoso it shows only Layer1 not Layer2.
Actually I am desiging first my patterns in Cadence then I have to use E-line(lithography) on Silicon chip to write these patters. I am facing the problem that temporary my layer1 is subtract to other layer2 otherwise on E-line it write both layers that make the chip worse.
Hope I explained in detail if not so then please ask again,