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  3. *Error* fprintf/sprintf: illegal format spec. - " $monitor...

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*Error* fprintf/sprintf: illegal format spec. - " $monitor(\"Time: %t, Control Variable %f\\n\",$time,Ctrl_1_);\n"

skillseeker
skillseeker over 12 years ago

 Hello,

Try to Create a Cadence view from the verilog file. Here is my section of the skill that it is having problem with.  If somebody has a easier way to create a Cadence view from a file let me know as well. I know what the problem here is but do not know the solution yet.

       if((ddGetObj(libName cellName viewName fileN nil "r") != nil) then
      CCScopyWrealCV(libName cellName viewName copyViewName)   
      ddDeleteObj(ddGetObj(libName cellName viewName fileN nil "r"))
      fileId = ddGetObj(libName cellName viewName fileN nil "w")
      WfileName = fileId~>readPath
      oPort  = outfile(WfileName)
      fileOut = infile(fileName)
      while(gets(string fileOut)
          fprintf(oPort string)          
      )
      close(fileOut)
      close(oPort)

Thanks

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  • skillseeker
    skillseeker over 12 years ago
     Thanks this helps but it is triggering the cross-view checks when it is being generated.... I have tried setting

    "vmsCrossViewCheck" to nil. It still brings up the pop-ups which is not desirable in my case. Is there an overwrite i can use or do i have to delete the view first before re-creating it.

    I am creating other filetypes along with this and it looks like schInstallHDL only works for Verilog.

    Is there any way i can do it the way i was doing in the above code and handle special characters properly,,

    Thanks
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  • skillseeker
    skillseeker over 12 years ago
     Thanks this helps but it is triggering the cross-view checks when it is being generated.... I have tried setting

    "vmsCrossViewCheck" to nil. It still brings up the pop-ups which is not desirable in my case. Is there an overwrite i can use or do i have to delete the view first before re-creating it.

    I am creating other filetypes along with this and it looks like schInstallHDL only works for Verilog.

    Is there any way i can do it the way i was doing in the above code and handle special characters properly,,

    Thanks
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