Hi, I'm trying to use the schematics and simulation setups provided in CMOSedu.com.
When I added IC6.1 library (I'm using virtuoso 6.1.5 version) and other directories and ran the spectre simulation, I got Netlist Error:
Could not find netlist procedure:ABbnNetlistProc instance "M0" in cell-view "Ch26_IC61" "Fig26_10" "schematic"
for all of the 3-terminal nmos and pmos transistors.
In the CDF editing window, the netlistProcedure field is written as "ABbnNetlistProc". After I deleted 'ABbnNetlistProc' and empty the field, the error message disappeared and netlist could be created, however, there's another error message: Error found by spectre during hierarchy flattening. ERROR (CMI-2116): M0: Too few terminals given (3 < 4) while running simulation.
Any suggestion to solve this error?
I suspect that the code is as below - this is from a very old solution (11004934) that is no longer on Cadence Online Support because it's obsolete (it was intended to help customers migrate from the old spectreS way of handling programmable bulk nodes, to the new inherited connection method - the old way was not supported when spectre (direct) was introduced back in IC443).
So the code was to help around 14 years ago... the clue that it was from me was the "AB" in the function name ;-)
Here's the code from that solution (apologies for the blank lines in the solution; it got munged slightly in a migration of our support system to a new system):
let((formatter netlister bulk sigs)
; Get hold of the formatter and netlister objects
; Print the standard signals. Can't use nlPrintInstSignals
; because the parentheses would be around the terminals in
; the termOrder, and not include the bulk node
nlPrintString(netlister " (" car(sigs))
nlPrintString(netlister " " sig)
) ; foreach
; Get the bn parameter and output that as the connection, if
; it is set
when(member(bulk '("D" "G" "S"))
nlPrintString(netlister " " bulk)
; Write out the close parenthesis, now that the bulk is written