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Related to QRC

narendra046

Hi 

while running QRC, i am shooted with an error " Error :Invalid DSPF cell,TIELO layout BCD035_DIG_5V, has no pins"

Please note I am using IC5141 version. BCD035_DIG_5V is a digital layout  library.

I am using ?dspfcells switch while running LVS to make all the logic gate as a black box, it mean, I am telling tool to take only I/O pins to caluculate parasitics (clearly asking the tool to calucate from gate level)

Could any one please help me in getting out of the above error. Thank you.

Parents
  • Quek

    Hi narendra

    In future, please kindly post tool usage questions on "Custom IC" forum. This forum is only for questions on SKILL programming.

    1. You can refer to the section "Creating Cell-level DSPF/SPEF or Transistor-level DSPF/SPEF" section in $QRC_HOME/doc/extUser/extUser.pdf for more details on DSPF flow.

    2. Pins are needed for dspf cells. If abstract views are available, an easy workaround is to use a skillscript to re-create the pins in abstract view in the layout views of each stdcell.

    3. In general, it is always best to let us know the specific tool version which you are using (e.g. qrc -version) and also the specific flow (e.g. Assura-QRC or PVS-QRC or Calibre-QRC).

    Best regards
    Quek

Reply
  • Quek

    Hi narendra

    In future, please kindly post tool usage questions on "Custom IC" forum. This forum is only for questions on SKILL programming.

    1. You can refer to the section "Creating Cell-level DSPF/SPEF or Transistor-level DSPF/SPEF" section in $QRC_HOME/doc/extUser/extUser.pdf for more details on DSPF flow.

    2. Pins are needed for dspf cells. If abstract views are available, an easy workaround is to use a skillscript to re-create the pins in abstract view in the layout views of each stdcell.

    3. In general, it is always best to let us know the specific tool version which you are using (e.g. qrc -version) and also the specific flow (e.g. Assura-QRC or PVS-QRC or Calibre-QRC).

    Best regards
    Quek

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