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  3. Multiple loops STB checks on a Transient simulation

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Multiple loops STB checks on a Transient simulation

Matth83
Matth83 over 11 years ago

Hi All,

 My circuit has several loops (e.g. 4) which stability need all to be checked at different transient points (e.g. 2 phases circuit).
I've included my 4 STB probes which instance names are STB_DIFF1, STB_CMFB1, STB_AUXN1 and STB_AUXP1.

Running a single STB at different time points, I can use acnames (in tran>Options>Output) and specify the name of the STB analysis to be run. More precisely, when setting up a default STB from ADE-L (or XL), the call in acnames is simply 'stb' (as would be 'ac' for an AC analysis, 'noise' for a Noise one). Of course, I specify also actimes with both phases timings.

Let's say I now want to run 4 STB analysis at the same time (instead of creating 4 testbenches that each run the same long transient just to simulate both phases time points with only 1 loop STB check).
I should be able to create a multiple_stb.scs file describing my 4 STB analysis as e.g.:

STB__DIFF1 stb start=1 stop=1G probe=ITOP.ICORE.STB_DIFF1.IPRB_DM annotate=status
STB__CMFB1 stb start=1 stop=1G probe=ITOP.ICORE.STB_CMFB1 annotate=status
STB__AUXN1 stb start=1 stop=1G probe=ITOP.ICORE.STB_AUXN1 annotate=status
STB__AUXP1 stb start=1 stop=1G probe=ITOP.ICORE.STB_AUXP1 annotate=status

 and add this multiple_stb.scs file in the Setup>Model Libraries files to be included in the netlist.
Unfortunately, I get the following error message when running the simulation:

    ERROR (SPECTRE-16848): Invalid instance name `ITOP.ICORE.STB_DIFF1.IPRB_DM' was given as value of parameter in stb analysis.
    ERROR (SPECTRE-16848): Invalid instance name `ITOP.ICORE.STB_CMFB1' was given as value of parameter in stb analysis.
    ERROR (SPECTRE-16848): Invalid instance name `ITOP.ICORE.STB_AUXN1' was given as value of parameter in stb analysis.
    ERROR (SPECTRE-16848): Invalid instance name `ITOP.ICORE.STB_AUXP1' was given as value of parameter in stb analysis.

My assumption is that the include being placed at the beginning of the input.scs netlist, the hierarchy is not yet described and the simulator doesn't recognize the probes hierarchy (note that the hierarchy of the probes above is correct as it's the same as the standard STB analysis that runs successfully).
For example, the standard 'stb' analysis (as all analysis) is defined at the bottom of my input.scs when the circuit has already been described.
I've tried to hack the netlist to place the include of multiple_stb.scs at the bottom of the netlist (right after the standard stb) and only "Run" the simulation (instead of "Netlist and Run") but the netlist gets recreated anyway...

Any idea to make this work? (if possible without hacking the input.scs netlist?)
Cheers,
Matthieu

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  • Andrew Beckett
    Andrew Beckett over 11 years ago

    Matthieu,

    No, it should not matter which order these are defined in - spectre generally does not require things to be defined before they are referenced. It simply suggests that the hierarchical instance name isn't correct.

    Just to make sure, I tried it, and it works fine for me.

    If you can't share the netlist, please contact customer support so a Cadence AE can look at this with you.

    Regards,

    Andrew.

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  • Matth83
    Matth83 over 11 years ago

    Hi Andrew,

     Thanks for your message. Checking the path is the first thing I did but since I've copied it from the netlist itself (doing a default STB analysis that works fine with one of the probes), I thought the include placement at the top could cause the errors.

    I've also tried to export my state to Ocean and added:

    analysis('stb ?anaName "STB__DIFF1" ?start "1" ?stop "1G" ?probe "/ITOP/ICORE/STB_DIFF1"  )


    with little success either...

    I cannot share the netlist as it is, maybe I'll create a dummy Testbench or contact the customer support.

    Thanks and regards,
    Matthieu

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