compare schematic and layout pins

Your question is somewhat vague. Have you tried anything?

layout:

a=geGetEditCellView()

a~>shapes~>lpp

a~>shapes~>theLabel

schematic:

a=geGetEditCellView()

a~>terminals~>name

wanted skill script which will compare and dump out the mismatch between the pins in layout and schematics for a given cell.

Something like this might do what you want:

/* CCFcompareTerminals.il

Author     A.D.Beckett
Group      Custom IC (UK), Cadence Design Systems Ltd.
Language   SKILL
Date       Jun 25, 2015 
Modified   
By         

Compare terminals between two cellViews

***************************************************

SCCS Info: @(#) CCFcompareTerminals.il 06/25/15.21:28:36 1.1

*/

/***************************************************************
*                                                              *
*                 CCFcompareTerminals(cv1 cv2)                 *
*                                                              *
*      Compare terminals between two different cellViews       *
*     and print out some information about the differences     *
*                                                              *
***************************************************************/

procedure(CCFcompareTerminals(cv1 cv2)
    let((termInfo termRec lcv1 lcv2)
        sprintf(lcv1 "%s/%s/%s" cv1~>libName cv1~>cellName cv1~>viewName)
        sprintf(lcv2 "%s/%s/%s" cv2~>libName cv2~>cellName cv2~>viewName)
        termInfo=makeTable('termInfo nil)
        foreach((prop cv) '(cv1 cv2) list(cv1 cv2)
            foreach(term cv~>terminals
                foreach(termName dbProduceMemName(term~>name)
                    unless(termRec=termInfo[termName]
                        termRec=list(nil)
                    )
                    putprop(termRec term~>direction prop)
                    termInfo[termName]=termRec
                )
            )
        )
        foreach(termName sort(termInfo->? nil)
            termRec=termInfo[termName]
            cond(
                (termRec->cv1 && !termRec->cv2
                    printf("Terminal %s missing in %s\n" termName lcv2))
                (termRec->cv2 && !termRec->cv1
                    printf("Terminal %s missing in %s\n" termName lcv1))
                (termRec->cv1 != termRec->cv2
                    printf("Terminal %s - direction mismatch (%s : %s) (%s : %s)\n" termName lcv1 termRec->cv1 lcv2 termRec->cv2))
            )
        )
        t
    )
)

Thanks, Andrew. This is perfect.

This is what i was looking for. only thing is i just need to assign cv1 & cv2 seperately.

thank you once again!!