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  3. How to connect an instance with a deeper hierarchical net...

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How to connect an instance with a deeper hierarchical net in schematic, like deepprobe it does

Laur9
Laur9 over 9 years ago

Hi,

I am trying to get a clean LVS, IC 6.1.6 & Assura,  from a complex chip.

We are using some IP, schematic and layout, that now need some small modification because of PDK updates. I have to place some new Met-Probes over the IP-Layout and of course also in schematic. The layout task is easy done, but in schematic I need to connect the met-probes with some internal nodes of the IP, that are not accessible from outside, have no pins. The schematic of IP can not be modified. The schematic editor doesn't accept connections like this "Inst_Name_A/Inst_Name_B/Net_X" or "Inst_Name_A.Inst_Name_B.Net_X".

How can be this done ?! Any suggestions ?!

Thanks in advance,

Laurent

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  • theopaone
    theopaone over 9 years ago

    It cannot be done in the schematic.

    Pins are used to jump connectivity levels of the hierarchy, when you attach a net to a symbol pin, that creates an instance terminal which connects the net at the current level of the hierarchy to the terminal in the nested schematic. This is the way the OA database works. Without a terminal in the schematic, you cannot connect a net from a higher level of hierarchy into the schematic.

    The reason layout works is because you are creating a physical connection which is managed by the LVS engine which looks at the physical layout through the hierarchy. The schematic has no such engine.

    You will have to modify the schematic to add the pins and generate a new symbol.


    Ted

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  • Laur9
    Laur9 over 9 years ago

    Yes Ted, you are right.

    I already knew about it. But I had the hope that someone of smart guys from Cadence will show us a trick or a workaround for it.

    It is similar to the global nets problem. So it should be solvable with a little effort and creativity.

    Regards

    Laurent

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  • theopaone
    theopaone over 9 years ago

    Global nets can be handled by adding inherited nets. You would think you could do something like that but the inherited net functionality forces a "globalness" on the nets and the schematic would still have to be modified.

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