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  3. How to add a wire and a label to the power and ground pin...

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How to add a wire and a label to the power and ground pin in schematic

Jesse1991
Jesse1991 over 9 years ago

Hello, everyone,

The standard cells provide by foundry PDK have four power pins, VDD, VBP, VSS ,VBN. In layout, I connected the VDD and VBP together to VDD, VSS and VBN together to VSS. The schematic generated by importing the structured verilog file don't have wires to connect VDD and VBP, VSS and VBN. Just like the figure below,

I want to add a wire to connect VDD and VBP , VSS and VBN together for each cell, and add a label VDD, VSS respectively.

like below (I add the wire and label manually)

How to use SKILL script to achieve this effect in Virtuoso Schematic ?  Thank you very much. I will appreciate your help.

Best Wishes to everyone,

Jesse

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  • Andrew Beckett
    Andrew Beckett over 9 years ago

    Jesse,

    You don't need to use SKILL for this. You can use the following steps to utilise a built-in feature of the schematic editor:

    1. On one of the instances, select both the VSS and VBN pins (click on the red VSS box, then shift-click the VBN pin so that both are selected)
    2. Options->Register Net Name per Terminal
    3. Type in "VSS" as the net name and OK the form
    4. Repeat step 1-3 but selecting VDD and VBP pins, and entering "VDD" as the net name.
    5. Now select all the instances you want to add the wires to, and hit the space bind key (corresponds to Create->Wire Stubs and Names). This should add the wires you want. You can do it more selectively by selecting the pins you wish to add wires to, but selecting instances will add the wire to any unconnected pin.

    Regards,

    Andrew.

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  • Shen X
    Shen X over 4 years ago in reply to Andrew Beckett

    Hi Andrew,

    I'm using the version 6.1.7 and "Register Net Name per Terminal" seems no more available?

    Thanks!

    Shen

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  • Shen X
    Shen X over 4 years ago in reply to Andrew Beckett

    Hi Andrew,

    I'm using the version 6.1.7 and "Register Net Name per Terminal" seems no more available?

    Thanks!

    Shen

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  • Andrew Beckett
    Andrew Beckett over 4 years ago in reply to Shen X

    Shen,

    Yes it does - I just checked (seems likely, since when I wrote my previous reply it would have been at a time when IC617 was the currently supported release). This is in the Options menu in the Schematic Editor window (perhaps you're looking at the wrong Options menu?)

    Andrew.

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  • Shen X
    Shen X over 4 years ago in reply to Andrew Beckett

    Andrew, this is what I can see. Not sure if someone has customized the interface.

     

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  • Andrew Beckett
    Andrew Beckett over 4 years ago in reply to Shen X

    Maybe somebody has left an old copy of the "schView.menus" file somewhere (based on an older release)?

    Can you check if typing this in the CIW returns something other than nil?

    ddGetStartup("menus/schView.menus")

    Andrew

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  • Shen X
    Shen X over 4 years ago in reply to Andrew Beckett

    It is "nil"

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  • Andrew Beckett
    Andrew Beckett over 4 years ago in reply to Shen X

    That's rather odd - must be something else.

    If you run "virtuoso -nocdsinit" does it work then?

    Andrew.

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  • Shen X
    Shen X over 4 years ago in reply to Andrew Beckett

    Hi Andrew,

    Now it works, for one cell type. In other words, the other cell types do not take over the registered net names from the pilot cell, although the supply terminals all have the same names.

    Thanks!

    Shen

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