Suppressing HDL Parser Warning and port mismatch warnings

Hello,

I have a script that calls the SKILL functions vmsUpdateCellViews for every cell of a list of libraries.

I want this to be automated, but calling this function for each cell produces a pop up warning which says the following:

"HDL Parser Error/Warnings: Parsing of Verilog file produced warnings. Do you want to view the warnings file?"

The warning relates to a lack of permission to access a cds.lib file which is not important to the functionality of the script.

For certain cells there is a warning relating to a port mismatch between the cellview (functional) and a symbol view, which is due to the lack of VDD and VSS pins.

I would like to suppress these if at all possible.

There is a function called envSetVal which can suppress warnings of certain types, but I can't find a list of the tools and environment variables anywhere. Could someone point me in the right direction?

The version of Cadence Virtuoso is IC6.1.7-64b.500.6. Thanks in advance.

Andrey