layout pin creation after binding the devices between schematic and layout

Inas,

You keep asking very vague questions, and seem to be expecting others to write your code for you (without explaining actually what you want). I've no idea what you're actually asking here.

Regards,

Andrew.

Andrew,

Why you see all my question are vague ones, and when i explain in details you also feel not satisfied?

I bind a layout to schematic. Then i did lxUpdateComponentsAndNets with choosing certain options inside this function like creating the pins.

I found that the pins generated are on OD (diffusion layer without label or pin name). So now i have the connectivity for each instance in the layout.

My Question:

How can i use this connectivity in placing the pins (with M1 layer purpose pin for the pin and its label) on source, drain, and gate for each instance in a form of skill script?

I hope i made my question clear now for you and others. And if there is someone who doesn't understand my question we can have a conversation here to explain more what is not clear.

But i can see that there is no one answering me even by a question Andrew. I told you before that I'm a very beginner with skill, so i expect that you understand that and don't keep me feel bad asking my questions here. If something is not clear please ask questions instead of telling me "you are a loser", and if you don't have time i hope others can help. I think this community is supposed to help new people, of course to a certain extent not in every thing, and i think i'm doing that already, i don't ask something here except after i give up from finding what i want in any other place.

Thanks for your understanding

Hmm, you appear to be rather sensitive. I did not at any point say (or even imply) "you are a loser". All I was doing was reiterating a point that is made quite clearly in the Forum Guidelines - that you should ask specific and bounded questions, and supply all relevant information. This is nothing to do with your expertise in SKILL - I quite expect people asking questions on these forums to not necessarily be SKILL experts - if they were, they probably wouldn't need to ask such questions. That doesn't excuse you from asking a well-framed, clear, question which describes what you are doing - I'd expect anyone with an engineering background (even if they are a student) to be able to do that.

Even though I work for Cadence, I don't respond here as part of my job - I do it to help others out in the community. I think I've demonstrated a fair degree of willingness to respond to pretty imprecise questions over the years, but given that we all have limited time, answering what I think is your question rather than what is actually your question isn't terribly efficient. You will see that I often ask posters to be more precise in their questions and the information that they provide. 

I generally prefer it if people can clearly describe what they are trying to do, explain what they've tried and have been unsuccessful with, what their aims are and so on - that is far easier than trying to interpret from a rather loose description.

Your original question just said "How can i create the pins to be connected and also use the connectivity to place the pins for each instance in the layout using skill script". No indication that you wanted the pins on a particular layer, or where you wanted those pins to be placed. Without that information the answer could just have been use lxGenFromSource() or lxUpdateComponentsAndNets(), but I would have assumed that you'd found that. Personally I didn't answer earlier because I was on vacation last week - and probably others didn't answer because they have less patience than me to dig out what you are really hoping to do.

So, I'm sorry if you're offended or feel bad, but that's your interpretation of what I said rather than what I actually said.

Even now, your question isn't that clear. Do you have a top-level pin for each pin of every instance? Or are some of the instances connected together? Is there only one instance in the cellView? What are you really trying to do here?

If it's just a matter of changing the layer used for the pins, you could do that with:

envSetVal("layoutXL" "initIOPinLayer" 'string "Metal1 drawing") ; or whatever layer you want

before initialising XL. Or you could use:

lxUpdateComponentsAndNetsStart(schId layId)
lxSetNetPinSpecs(?nets schId~>terminals~>net~>name ?lpp list("Metal3" "drawing") ?width 0.2 ?height 0.2)
lxSetGenerateOptions(?instances nil) ; if you don't want the instances to be created
lxUpdateComponentsAndNetsFinish(schId layId)

If you are just trying to create pins on top of the instance pins, that would be a matter of doing something like this:

foreach(inst listOfInstances
  foreach(instTerm inst~>instTerms
    ; if this is an I/O of this cell
    when(instTerm~>net~>term
      foreach(pin instTerm~>term~>pins
        foreach(fig pin~>figs
          ; propagate the pin shape up to this level
          newFig=dbCreateRect(layId list("Metal1" "drawing") dbTransformBBox(fig~>bBox inst~>transform))
          dbCreatePin(instTerm~>net newFig nil instTerm~>net~>term)
        )
      )
    )
  )
)

Something like that (this is untested). It all depends what pin connectivity model you want if there is more than one instance terminal connected to the same net - but since you didn't clearly state your problem, I'm having to guess. 

Kindest Regards,

Andrew.

Thanks Andrew for this detailed reply.

But for me any word can bring me down or up specially for something i'm struggling to get familiar with it in a very small time.

Anyway, i'll try to explain what i want again in more details.

1) I have a schematic like in the following snap shot:

2)  A layout pattern generated from a skill script ( this layout has the instances mentioned in the above schematic and the rest of some dummies are not put in the schematic)

3) I want to bind the above schematic with this layout using this script

procedure(bind_inst(schCV layCV instList)

lxSetConnRef("sch_lay_binding" "CM_UPPER" layCV "CELLVIEW")

foreach(instName instList

       bndRemoveInstBindingByName(schCV instName)

          foreach(inst setof(x layCV~>instances strncmp(x~>name instName 2) == 0)
               bndRemoveInstBindingByName(layCV inst~>name)
               bndAddInstsBindingByName(schCV instName layCV inst~>name)
        )

)
lxUpdateComponentsAndNets(schCV layCV
?initCreateInstances nil
?initDoStacking nil
?initDoFolding nil
?initCreatePins t
?initGlobalNetPins nil
?initCreatePadPins nil
?initCreateBoundary nil
?initCreateSnapBoundary nil
?initCreateMTM nil
?deleteUnmatchedInsts nil
?deleteUnmatchedPins nil
?updateReplacesMasters nil
?updateWithMarkers nil
?updateNetsOnly t
?updateLayoutParameters t
?extractSchematic t )

)
bind_inst(dbOpenCellViewByType("sch_lay_binding" "CM_UPPER" "schematic")
dbOpenCellViewByType("sch_lay_binding" "CM_UPPER" "layout_test") '("M7" "M6" "M9"))

What i got in the CIW after running it shown in the following snap shot, the only instances are bound but no pins created. 

Questions:

1) Why the pins are not created despite mentioning that option "TRUE" in the lxUpdateCompnentsAndNets?

2) If these options are not written so their default values are "TRUE", correct?

Help Request:

1) need to know what should i modify in my script in order to Create the pins with their labels on M1 with purpose pin for both the pin and its label?

2) Since the instances in the layout are bound to schematic so the connectivity for each instance in the layout are known 

example: for M7

"inst~>instTerms~>net~>name
("IREF" "VDD" "IREF" "VDD")"

So i need to make use of this information + pins created from the previous step and place the appropriate pins for source, drain, gate for each instance (multiplier) in the layout as i need to connect them virtually.

how can i do that in my case?

I hope i made it so clear.

Thanks

Regards,

Inas

Dear Inas, Dear Andrew.

Here is my contribution. First, i would like to emphasys on the fact that i learnd a lot from reading Adrews post/Answers. This is said.

Second (question to andrew), can we post you abFunction.il files on other,let say, non-cadence Forum, or is it restricted ?

Put the following files in one of your  `` getSkillPath() ''

load("ineed.il")  load("generateAllPins.il") in CIW (the main cadence window)

Then load the created function : generateAllPins()

With an open layout, it fetch for ever instance name with a | ` pipe' the corresponding schematic instance, and put pins on the placed instances at the corresponding position.

It's maybe not what you want, but you can get inspired to do you own function. I do no deal with global pins ie. vdd! gnd! ) But it should work with bus<N1:N2> connected to  Instance<N3:N4>

NB : given 'as is', no support on that. (i should have removed my comments for proper reading, but ... )

++

 ___ file 1 : bus2flat.il ___ 

;; copyleft ebecheto


ineed('netMakeBus)

defun(bus2flat (@optional (net "Q<1:10>"))
let((netb)
netb=parseString(net ":<>" )
netMakeBus(car(netb) list(atoi(cadr(netb)) atoi(caddr(netb))))
))


; bus2flat();=> ("Q<1>" "Q<2>" "Q<3>" "Q<4>" "Q<5>" "Q<6>" "Q<7>" "Q<8>" "Q<9>" "Q<10>")
; bus2flat("in<1:16>");=> ("in<1>" "in<2>" "in<3>" "in<4>" "in<5>" "in<6>" "in<7>" "in<8>" "in<9>" "in<10>" "in<11>" "in<12>" "in<13>" "in<14>" "in<15>" "in<16>")


printf("see also functions _bus2()  and bus2_() in terminal2pin.il\n")
printf("ineed('terminal2pin)\n")
;; foreach(mapcar g geGetSelectedSet() when(g~>net~>term g~>net~>term~>name=string_2bus(g~>net~>term~>name)))

 ___ file 2 : createPinLPP.il ___ 

;; copyleft ebecheto
;; see also createInstPins in  pinAddText.il

defun(createPinLPP (@optional (name "GND")(bBox list(0:0 0.2:0.2))(lpp '("M1" "pin"))(dir "inputOutput")(rot "R0")(accessDir '("top" "bottom" "left" "right")))
let((pin term disp)
printf("bBox:%L\n" bBox)
pin=leCreatePin(cv lpp "rectangle" bBox name dir accessDir)
term=pin~>term
disp=dbCreateTextDisplay(term term lpp t centerBox(bBox) "centerLeft" rot "roman" 0.5) 
disp~>isNameVisible=nil ;makes the 'name=' invisible
disp~>parent=pin~>fig   ;makes the text moving with the rect pin
pin))



; createPinLPP(name bBox lpp dir)

; textDisplay oki for IBM but not for AMS : label !

 ___ file 3 : generateAllPins.il ___ 

;; copyleft ebecheto

;=> Nice one `que j'ai fait' ! ouvrir fenetre layout avec les elements places, sans les pins.
; et ca place les pins la ou il faut tout seul comme un grand.
; marche pas sur les mos, car il n'y a pas de couches pins sur les mos... pity
; load("/home/validmgr/ebecheto/Skill/generateAllPins.il")
; global power supply vdd!/gnd! treated separately with :  genPinMaster.il


ineed('(getInstTermPointLPP createPinLPP textDisplay2label metalPin2pinDrawing bus2flat) )



;; cv~>??
;; setof(c cv~>conns rexMatchp("!$" c~>name));=>(db:0x6609b81a db:0x6609b81b db:0x6609b82c db:0x6609b82d) ;=> doublons
;; setof(c cv~>sigNames rexMatchp("!$" c));=>("gnd!" "vdd!") ;<= pas de doublons

; append(cvs~>terminals setof(c cv~>sigNames rexMatchp("!$" c)))
; TODO : Rajouter vdd! xxx! (globals) si c'est possible
; en attendant, utiliser genPinMaster
; global terminals 
;; gloTerm=foreach(mapcan s setof(c cv~>sigNames rexMatchp("!$" c)) 
;; setof(st cvs~>terminals st~>name==s))


;cvs~>sigNames
;=> ("in<15>" "Dzio<13>" "Dzio<10>" "Dzio<9>" "Dzio<12>" "out<8>" "out<2>" "VSS" "CHOP" "out<14>" "Dzio<11>" "RDIOD" "sub!" "VSB2" "out<13>" "out<12>" "Vref" "in<12>" "RN" "Dzio<14>" "in<8>" "out<11>" "out<10>" "out<7>" "in<0>" "Dzk" "in<11>" "Dzio<5>" "Dzio<1>" "in<10>" "in<9>" "T1" "Dzio<4>" "VDD" "out<9>" "Dzio<0>" "VDB1" "out<0>" "in<6>" "in<5>" "Dzio<3>" "Dzio<8>" "in<4>" "out<15>" "in<3>" "Dzo" "in<2>" "out<4>" "out<3>" "in<1>" "in<7>" "Dzio<2>" "Dzio<7>" "Cstim" "Dzio<6>" "out<6>" "in<14>" "out<5>" "Dzi" "ENA" "out<1>" "in<13>")
; cv=geGetWindowCellView()

defun(generateAllPins (@optional (cv t)(only1 t)(labelPin t))
let( (cvs  its flatBus noBus flats sig dir ins pn apn iname)
when(cv==t cv=geGetWindowCellView())
cvs=dbOpenCellViewByType(cv~>libName cv~>cellName "schematic")
unless(cvs printf("Hey dude, where is your schematic ? %L\n" list(cv~>libName cv~>cellName )))

nameDirs=foreach(mapcan tn cvs~>terminals 
if(length(parseString(tn~>name ":"))>1 foreach(mapcar bus bus2flat(tn~>name) list(bus tn~>direction)) list(list(tn~>name tn~>direction)))
);=>  (("ENA" "input")... ("out<11>" "inputOutput"))

sigNames=setof(s cvs~>sigNames dbFindSigByName(cvs s)~>term)

foreach(mapcar nameDir nameDirs
sigName=car(nameDir)
; name;=>"Q_0"
; itsd=cadr(its);=>(("Z" "I10") ("A" "I0"))
itsd=foreach(mapcar mit dbFindSigByName(cvs sigName)~>memInstTerms list(car(mit)~>name dbGetMemName(car(mit)~>inst~>name cadr(mit))))
dir=cadr(nameDir)

when(only1 itsd=list(car(itsd)))
foreach(mapcar it itsd
;it=car(itsd);=>("Z" "I10")
ins=cadr(it);=>"I10"
pn=car(it);=>"Z"  ;<== TODO : if instance as a pin Z<0:1> it bugs .... or do it before in the creation of itsd
printf("placing %s-pin on %s-term of %s-inst._%L\n" sigName pn||"pn?" ins||"ins?" list(only1 cv~>terminals~>name))
;cv~>instances~>name;=>("|I0" "|I5" "|I1" "|I2" "|I7" "|I3" "|I4" "|I6" "|I8" "|I9" "|I10" "I__167844" "I1")
unless(only1&&member(sigName cv~>terminals~>name) printf("pin%L\n" list(ins pn))
unless(ins printf("WARNING ins=nil?=%L in : %L;<= CANNOT FIND\n" ins it))
when(ins 
iname=if(length(pins=parseString(ins "<>"))>1 strcat("|" car(pins) "(" cadr(pins) ")") strcat("|" ins))
; si Instance<0> => |Instance(0), sinon |Instance
if(inst=car(setof(inst cv~>instances inst~>name==iname))
;; schema inst INST<0:1> ==> layout |INST(0) et |INST(1) pourquoi ce changement ?
;; ||inst=car(setof(inst cv~>instances inst~>name==strcat("|" ins))) replace (par< et )par>
;; ceci deverait etre le default mode, mais permettre une liste de correspondance (dico)
then
apn=assoc(pn getInstTermPointLPP(inst))
;=>("Z" (5.1 22.71) ("M1" "pin") ((5.0 22.41) (5.2 23.01)) db:0x1495141d)
; createPinLPP(name bBox lpp dir)
bBox=nth(3 apn) lpp=nth(2 apn); dir=nth(4 apn)~>pin~>term~>direction
printf("createPinLPP%L\n" list(sigName bBox lpp dir))
if(bBox&&lpp then createPinLPP(sigName bBox lpp dir) else printf("NO LPP or bBox for:%L\n" list(sigName bBox lpp dir)))
else
printf("%s not found\n" iname)
)))
)
)
when(labelPin textDisplay2label(cv) metalPin2pinDrawing(cv))
))

printf("generateAllPins()\n")
printf("generateAllPins(t);=> geGetWindowCellView()\n")
printf("generateAllPins(t t)\n")
printf("generateAllPins(t nil t)\n ;<= que j'utilise pour AMS035\n")
printf("generateAllPins(t nil);<= not only one => for all => overides\n")
printf("generateAllPins(t t t);<=default : one pin on each term for ams (label and PIN purpose)\n")
printf("generateAllPins(t t nil);<= one pin on each term for ibm (textdisplay, default layer)\n")

 ___ file 4 : getInstTermPointLPP.il ___ 

;; copyleft ebecheto

; pour un schematic ou layout
; getInstTermPointLPP()

procedure(getInstTermPointLPP(@optional (inst css()) )
let((point master pointList v5or6 labs ilab) 
master=inst~>master  ; printf("INST:%L\n" list(inst master~>terminals) )
labs=setof(shape inst~>master~>shapes shape~>objType=="label");<= utile si que des labels sans pin
foreach( conn master~>terminals 
; printf("INST:%L\n" list(conn~>name conn conn~>pins~>figs conn~>pins~>??) )
; printf("INST:%L\n" list(conn~>name conn conn~>pins~>fig~>??) ) ;version 5.141 => ~>fig et non figs !!
when(not(car(v5or6=conn~>pins~>figs)) v5or6=list(conn~>pins~>fig) )
; printf("\nv5or6 %L ?\n" car(v5or6))
when(point=centerBox(caar(v5or6)~>bBox);<= OK car une seul pin "PLUS" dans le symbol(figs)
pointList=append(pointList list(list(conn~>name dbTransformPoint(point inst~>transform) car(conn~>pins~>fig~>lpp)
dbTransformBBox(caar(v5or6)~>bBox inst~>transform) caar(v5or6)
)))
);secure layout error suba...
unless(conn~>pins
printf("terminal [%s] n'a pas de pin => label\n" conn~>name)
ilab=car(setof(lab labs lab~>theLabel==conn~>name))
; printf("%L\n" ilab~>??) ?! vsub! exist dans mast~>terms~>name mais dans labs~>name c'est vsubo! et pas de vsub!...
pointList=append(pointList list(list(conn~>name dbTransformPoint(ilab~>xy||'(0 0) inst~>transform) ilab~>lpp
dbTransformBBox(ilab~>bBox||list(0:0 0:0) inst~>transform) ilab
)))
);<== terminal sans rectangle pins : juste un label => reccup xy label, poser pin mini_rect 0.4x0.4
) pointList ));let proc
; assoc("A" getInstTermPoint()) ;=> ("A" (0.0 0.125))
; assoc("VBBB" getInstTermPointLPP(car(insts)))
;=> ("VBBB" (1270.925 1923.1) ("PIN" "metal4") ((1270.675 1922.85) (1271.175 1923.35)))
; rajout de la bBox de la pin

printf("getInstTermPointLPP()\n")


;; inst=css()
;; inst~>master~>sigNames;=> ("vsubo!" "PLUS" "MINUS" "PAD" "gnd3r!" "vsub!" "Z" "vdd3o!" "vdd3r1!" "vdd3r2!" "gnd3o!")
;; labs=setof(shape inst~>master~>shapes shape~>objType=="label")
;; labs~>??

;; ilab=car(setof(lab labs lab~>theLabel=="PAD"))
;; ilab=car(setof(lab labs lab~>theLabel=="vusb!"))


;; setof(lab labs lab~>theLabel=="Z");=> (db:0x2c903d69)
;; ilab=car(setof(lab labs lab~>theLabel=="Z"))
;; ilab~>??
;; ;=> (db:0x2c903d69 cellView db:0x2c906a1a objType "label" prop nil bBox ((36.173 199.0) (37.127 200.0)) children nil groupMembers nil isAnyInst nil isShape t matchPoints nil net nil parent nil pin nil purpose "metal1" textDisplays nil assocTextDisplays nil markers nil figGroup nil isUnshielded nil shieldedNet1 nil shieldedNet2 nil layerName "PIN" layerNum 70 lpp ("PIN" "metal1") connRoutes nil routeStatus "normal" font "stick" height 1.0 isDrafted t isOverbar nil isVisible t justify "centerCenter" labelType "normalLabel" orient "R0" theLabel "Z" xy (36.65 199.5) hasTextDisplay nil)


;; ;; renvoie un liste de
;; ;; (label point lpp bBox fig?)
;; ;; ("A" (52.925 690.225) ("MET4" "pin") ((8.45 645.55) (97.4 734.9)) db:0x35c7da63 )

 ___ file 5 : ineed.il ___ 

;; copyleft ebecheto

;; quand j'y pense, ma fonction ineed ressemble pas mal a (require 'truc) de emacs... non ? 
;; si ce n'est les search dans les differents repertoires

;; ineed('whereExistCell3) ;=> ok charge whereExistCell3.il
;; putd('whereExistCell3 nil);=> purge la fonction


defun(ineed (func @optional (force nil))
cond((nil nil)
(listp(func) foreach(mapcar f func ineed(f force)))
(t unless(fboundp(func)&&not(force) load(strcat(symbolToString(func) ".il"))))))

;; ineed('(getInstTermPoint whereExistCell3))
;; putd('whereExistCell3 nil)
;; putd('getInstTermPoint nil)


; oldest -1
;; defun(ineed (func @optional (force nil))
;; cond((nil nil)
;; (listp(func) foreach(mapcar f func unless(fboundp(f)&&not(force) load(strcat(symbolToString(f) ".il")))))
;; (t unless(fboundp(func)&&not(force) load(strcat(symbolToString(func) ".il"))))))

; oldest version
;; defun(ineed (func) unless(fboundp(func) load(strcat(symbolToString(func) ".il"))))

 ___ file 6 : itos.il ___ 

;; copyleft ebecheto

; integer to string; not nessessary, mais ca prends moins de place dans un code
defun(itos (i) 
cond(
(type(i)=='fixnum sprintf(nil "%d" i))
(type(i)=='flonum sprintf(nil "%g" i))
(t i)
))

;; itos(2);=> "2"
; chui con il existe la fonction a2s : all to string :
; a2s(2);=>"2"
; crotte a2s n'est pas definit dans ocean standalone...

;; itos(2.2) ;=> "2.2"
;; itos(2) ;=> "2"
;; itos(223333.9) ;=> "223334"
;; itos(0.0000778) ;=> "7.78e-05"
;; type(2.2);=>flonum
;; type(2);=>fixnum
;; i=0.000003876

 ___ file 7 : metalPin2pinDrawing.il ___ 

; load("genBox.il")

defun(metalPin2pinDrawing (@optional (cv nil)(purp "pin"))
let((tab vlpp)
tab='(("MET1" "metal1")("MET2" "metal2")("MET3" "metal3")("MET4" "metal4")("PAD" "pad"))
unless(cv cv=geGetWindowCellView())
terms=cv~>terminals
;; mistake : pin is in fact a terminal in this case
foreach(term terms ;term=car(terms);=> db:0x2f50839a
foreach(pin term~>pins ; pin=car(term~>pins)
lpp=pin~>fig~>lpp;=> ("MET1" "pin")
; "pin" purpose why not drawing too
; buggy tech name used with function liIsValid... metal1 and not MET1 ...
; if( leIsLayerValid( vlpp=list("PIN" cadr(assoc(car(lpp) tab)))) ...)
if(and(
cadr(lpp)==purp  
purpose=cadr(assoc(car(lpp) tab))
leIsLayerValid( vlpp=list("PIN" purpose))
);and
then vlpp=list("PIN" purpose)
pin~>fig~>lpp=vlpp
else printf("No PIN %s layer found\n" car(lpp))
)
foreach(child pin~>fig~>children 
if(and(
cadr(child~>lpp)==purp 
purpose=cadr(assoc(car(child~>lpp) tab))
vlpp=list("PIN" purpose)
);and
then
child~>lpp=vlpp
else printf("No child of PIN %L for %s lpp%L?\n" vlpp||"nul" child~>theLabel child~>lpp)
))))))


;; leIsLayerValid(list("PIN" "metal2"));=> t
;; leIsLayerValid(list("PIN" "M2"));=> nil

printf("metalPin2pinDrawing()\n")
printf("metalPin2pinDrawing(geGetWindowCellView()) \n")
printf("metalPin2pinDrawing(nil \"drawing\")\n")

 ___ file 8 : netMakeBus.il ___ 

;; copyleft ebecheto

ineed('itos)
;;modif a2s -> itos car a2s n'existe pas toujours suivant les version de cadence

defun(netMakeBus (@optional (net "S_87-4_")(L 8)(flat t)(bus "<"))
let((from to expand as)
if(listp(L) then from=car(L) to=cadr(L) else from=0 to=L-1)
bud=if(bus=="<" ">" "")
expand='()
for(i from to expand=cons( strcat(net bus itos(i) bud) expand))
expand=reverse(expand)
cond(
(flat==t expand)
(flat=='sym sh(sprintf(nil "echo \"%s\"\n" as=apply('strcat foreach(mapcar a expand strcat( " " a))))) as)
(t list(strcat(net "<" itos(from) ":" itos(to) ">")))
);cond
))

;; netMakeBus("Q" '(4 6));=>("Q<4>" "Q<5>" "Q<6>")
;; netMakeBus("Q" '(1 5));=>("Q<1>" "Q<2>" "Q<3>" "Q<4>" "Q<5>")
;; netMakeBus("Q" 5)  ;=>("Q<0>" "Q<1>" "Q<2>" "Q<3>" "Q<4>")
;; netMakeBus("Q" 5 t);=> ("Q<0>" "Q<1>" "Q<2>" "Q<3>" "Q<4>")
;; netMakeBus("Q" 5 nil);=>("Q<0:4>")
;; netMakeBus("Q" 5 t "_");=>("Q_0" "Q_1" "Q_2" "Q_3" "Q_4")
printf("netMakeBus(\"Q\" 5 t \"_\");=>%L\n" netMakeBus("Q" 5 t "_"))
printf("netMakeBus(\"Q\" 5 'sym);=>\" Q<0> Q<1> Q<2> Q<3> Q<4>\"")

defun(netMakeTruePos (@optional (net "Q<5>") (L '(4 10)) (true t))
foreach(mapcar i linRg(1 cadr(L) 1) if(i==car(L) net true)))
;; netMakeTruePos();=>(t t t "Q<5>" t t t t t t)
;; netMakePost("BU<4>" list(5 2*10));=>(t t t "BU<4>" t t t t t t t t t t t t t t t t)
;; ; Position t
;; netMakeTruePos("PD_5" '(10 10)) ;=> (t t t t t t t t t "PD_5")

 ___ file 9 : textDisplay2label.il ___ 

;; copyleft : ebecheto

; transform every textDisplay associated to a pin into a label (for ams_c35)

defun(textDisplay2label (@optional (cv nil))
unless(cv cv=geGetWindowCellView())
terms=cv~>terminals
;; mistake : pin is in fact a terminal in this case
foreach(term terms
;pin=car(pins);=> db:0x2f50839a
tdps=term~>assocTextDisplays
foreach(tdp tdps
; tdp=car(tdps)
label=dbCreateLabel(cv tdp~>lpp tdp~>xy term~>name tdp~>justify tdp~>orient tdp~>font tdp~>height)
;;label~>parent=car(term~>pins)~>fig
label~>parent=tdp~>parent
dbDeleteObject(tdp)
)
)
)

ebecheto said:

Second (question to andrew), can we post you abFunction.il files on other,let say, non-cadence Forum, or is it restricted ?

Rather than posting copies of any "ab" functions elsewhere, better to just post a link to the source location. If it's on support.cadence.com then you definitely should not post a copy elsewhere; on the forums, not so restrictive, but I'd really prefer if you reference the source on the forums.

Regards,

Andrew.

Inas Mohammed said:

Questions:

1) Why the pins are not created despite mentioning that option "TRUE" in the lxUpdateCompnentsAndNets?

2) If these options are not written so their default values are "TRUE", correct?

I suspect that the pins had already been created. Since this is the update components and nets rather than gen from source, it only updates if it deems that an update is necessary. Perhaps you already have the pins present (on another layer) in your layout? In an earlier post in this thread you said they'd been created on OD. If so, you'll need to delete them first and then do the update.

The default value is not necessarily true - it's the value of a cdsenv variable. If you type arglist('lxUpdateComponentsAndNets) you'll see which cdsenv vars the defaults come from (these are all layoutXL env vars).

Regards,

Andrew.