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  3. skill code to automatically connect power pins in schem...

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skill code to automatically connect power pins in schematic

Nhumai
Nhumai over 7 years ago

HI All,

I need to drop a piece of wire and correct power name on the pins of all the symbol in my schematic. Which mean I need to connect power automatically. 

I don't know who to start since I am a beginner of skill. Can someone help to let me know how to start ? 

thanks 

Nhumai 

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  • skillUser
    skillUser over 7 years ago

    Hi Nhumai,

    Try pressing the Space Bar which should invoke the schHiCreateWireStubs() function - for one or more instance(s) it can create wire stubs at all or specified terminals; you can 'register' certain terminals so that only those will have connections made for them, rather than all instance terminals.

    Hopefully this will help you.

    Best regards,

    Lawrence.

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  • Nhumai
    Nhumai over 7 years ago in reply to skillUser

    Hi Lawrence,

    I tried it and it is working but I do have couple questions about it 

    1/ how can I register terminal ? 

    2/ how can I control the length and the direction of the piece of wire schHiCreateWireStubs() drop on the terminal ? The reason is  we have a legacy data base and all the power pins is very close to each other if the wire is  a little long or not in the correct direction then they short together 

    thanks 

    Nhumai 

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  • Andrew Beckett
    Andrew Beckett over 7 years ago in reply to Nhumai

    Glad to see my original suggestion in your other post worked for you ;-)

    You can register terminals interactively by hitting the "..." button next to the line with "registered terminals only" on the create instance form, or using the Options->Register Net Name per Terminal menu (you then have to select the pin on an instance and give it the net name to use).

    Probably easier is to use SKILL:

    ciRegisterDevice("MyBlocks" list(list("opamp090" nil nil)))
    ciRegisterDefaultNetName("MyBlocks" "VDD" "AVDD")
    ciRegisterDefaultNetName("MyBlocks" "VSS" "AVSS")

    If you want it to be for all libraries, then the first line can be:

    ciRegisterDevice("MyBlocks" list(list(nil nil nil)))

    The stub length can be controlled using:

    envSetVal("schematic" "stubLength" 'int 1)

    (the default is 2). Search in the Help menu (in the box at the top) for stubLength for more details.

    Regards,

    Andrew.

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  • Nhumai
    Nhumai over 7 years ago in reply to Andrew Beckett

    Hi Andrew,

    thanks a lot for you suggestion. Let me try them now and I might have more questions :-) 

    thanks again 

    Nhumai 

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  • Nhumai
    Nhumai over 7 years ago in reply to Andrew Beckett

    Hi Andrew,

    can I control the direction of the stubs ? if I can please tell me how. 

    I need all of register stubs to be in horizontal 

    thanks a lot 

    Nhumai 

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  • Andrew Beckett
    Andrew Beckett over 7 years ago in reply to Nhumai
    Nhumai said:
    can I control the direction of the stubs

    No.

    I’m surprised you’d want this as you said the pins are close together so this would just increase the likelihood of stubs creating shorts between pins on the top and bottom edges of symbols. 

    Andrew 

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  • Nhumai
    Nhumai over 7 years ago in reply to Andrew Beckett

    Hi Andrew,

    Because the pins are closed together that is why I need to control stubs direction 

    the stubs right now in the vertical direction which short all the pins together (powers pin in the middle of inverter symbol. If I can control the direction of stubs then I will make them in horizontal and the problem solved :-) . 

    I am not sure why when I use "wire stubs and name" without register vpwr, vpb, vnb, vgnd then A and Y have a horizontal stubs but all  vpwr, vpb, vnb, vgnd have vertical stubs which short all of them together. If I can control the stubs to put all of them in horizontal direction then that is perfect. 

    We don't want to change the symbol so ... 

    thanks a lot Andrew.

    Nhumai 

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  • Andrew Beckett
    Andrew Beckett over 6 years ago in reply to Nhumai

    Hi Nhumai,

    This is because the wire stub creation is designed for standard symbols which have pins around the edges, and so the wire stubs are drawn perpendicular to the side of the symbol the pin is on. These pins in the centre of the symbol are mistakenly thought to be on the top or bottom edge, and hence have vertical stubs. It's not designed for your kind of unusual symbol.

    The only solution here (other than an enhancement request for the wire stub creation to be a bit smarter and avoid creating shorts) is to write some custom SKILL code. Because I was feeling generous and had thought how to implement this, I quickly threw together some code to do this - if it's not quite what you want, hopefully it gives you a strong enough start to be able to modify it to do what you want.

    Regards,

    Andrew.

    /* abCreatePowerPinStubs.il
    
    Author     A.D.Beckett
    Group      Custom IC (UK), Cadence Design Systems Ltd.
    Language   SKILL
    Date       Sep 09, 2018 
    Modified   
    By         
    
    Function to create wire stubs on specified power pins.
    
    Some examples:
    
    ; create stubs on default power pins on all instance in
    ; current cellView
    abCreatePowerPinStubs() 
    
    ; create stubs on power pins "vdd" and "vss" for just
    ; selected instances:
    abCreatePowerPinStubs(?instances geGetSelSet() ?powerPinNames list("vdd" "vss"))
    
    ***************************************************
    
    SCCS Info: @(#) abCreatePowerPinStubs.il 09/09/18.18:12:57 1.1
    
    */
    
    /*********************************************************************
    *                                                                    *
    *                       abCreatePowerPinStubs(                       *
    *            [?instances geGetEditCellView()~>instances]             *
    *             [?stubDelta schGetEnv("schGridSpacing"):0]             *
    *            [?powerPinNames list("pwr" "pb" "nb" "gnd")]            *
    *          [?fontHeight schGetEnv("createLabelFontHeight")]          *
    *           [?fontStyle schGetEnv("createLabelFontStyle")]           *
    *           [?fontJustify schGetEnv("createLabelJustify")]           *
    *                         [?fontOffset 0:0]                          *
    *                                 )                                  *
    *                                                                    *
    * Look at specified instances (or all instances in current cellView) *
    *  and see if any have unwired pins which match the powerPinNames.   *
    *   If they do, then create a wire stub in the direction specified   *
    *    by stubDelta (defaults to a grid spacing to the right). ALso    *
    *  provide controls over the font height, style, justification and   *
    *     offset from the wire - mostly defaulting to the schematic      *
    *                   editor defaults for the same.                    *
    *                                                                    *
    *********************************************************************/
    
    procedure(abCreatePowerPinStubs(@key 
            (instances geGetEditCellView()~>instances)
            (stubDelta schGetEnv("schGridSpacing"):0)
            (powerPinNames list("pwr" "pb" "nb" "gnd"))
            (fontHeight schGetEnv("createLabelFontHeight"))
            (fontStyle schGetEnv("createLabelFontStyle"))
            (fontJustify schGetEnv("createLabelJustify"))
            (fontOffset 0:0)
            )
        let((cv transform bBox overlappingShapes start end stub stubCreated)
            ;----------------------------------------------------------------
            ; For all instances passed in, check they're actually an instance
            ;----------------------------------------------------------------
            foreach(inst instances
                when(inst~>objType=="inst" && inst~>purpose!="pin"
                    transform=inst~>transform
                    cv=inst~>cellView
                    ;--------------------------------------------------------
                    ; Then process the terminals and find matching powerPinNames
                    ; and visit each pin figure
                    ;--------------------------------------------------------
                    foreach(term inst~>master~>terminals
                        when(member(term~>name powerPinNames)
                            foreach(pin term~>pins
                                foreach(pinFig pin~>figs
                                    ;----------------------------------------
                                    ; Transform to top level and check if there's
                                    ; already a wire there
                                    ;----------------------------------------
                                    bBox=dbTransformBBox(pinFig~>bBox transform)
                                    overlappingShapes=dbShapeQuery(
                                        cv
                                        list("wire" "drawing")
                                        bBox
                                        0
                                        0
                                    )
                                    ;----------------------------------------
                                    ; If not, create a wire stub, and add
                                    ; a wire label
                                    ;----------------------------------------
                                    unless(exists(shape overlappingShapes
                                            shape~>objType=="line" ||
                                            shape~>objType=="path")
                                        start=centerBox(bBox)
                                        end=mapcar('plus start stubDelta)
                                        stub=dbCreateLine(
                                            cv 
                                            list("wire" "drawing")
                                            list(start end)
                                        )
                                        schCreateWireLabel(
                                            cv
                                            stub
                                            mapcar('plus end fontOffset)
                                            term~>name
                                            fontJustify
                                            "R0"
                                            fontStyle
                                            fontHeight
                                            nil
                                        )
                                        stubCreated=t
                                    )
                                )
                            )
                        )
                    )
                )
            )
            ;----------------------------------------------------------------
            ; Return whether a stub was created or not
            ;----------------------------------------------------------------
            stubCreated
        )
    )
    

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  • Nhumai
    Nhumai over 6 years ago in reply to Andrew Beckett

    Hi Andrew,

    thanks a lot and sorry for reply late. I was so busy with work. 

    Let me try to test this script to see if I can use it . 

    Nhumai 

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