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OceanScript Postsim Net Name

Freddyyyyyyy

Hi all,

I encounter a problem when using Ocean Script run post transient simulation.

As in the extraction file, some nets have format like "XI33<2>/abc/net5" and "X12/net1"

I can check the net waveform in VIVA. But once I try use OceanScript to get its value, as v("/XI33<2>/abc/net5"), a warning comes up,

"The output '/XI33<2>/abc/net5' you selected does not exist. ".

But for net "X12/net1", all functions work. No warning or errors.

I guess its the name syntax causing this issue.

Could anybody tell me the right syntax? 

Parents
  • ZoltanT

    I recall that there are some differences btw ADE's VT, VF, etc. functions net access convention and the pure v("" ?result ) notation. Try v("XI33<2>/abc/net5").
    Otherwise check the results of the output() command.

  • Freddyyyyyyy
    in reply to ZoltanT

    Thanks for your reply. I have check the net return in outputs(). The net name is exactly "/XI33<2>/abc/net5". But v("/XI33<2>/abc/net5") still cannot work.  And I have tried v("XI33<2>/abc/net5"). Not work either.  Any other suggestions?

  • ZoltanT
    in reply to Freddyyyyyyy

    It is very strange. I do not know the solution, but I think the <> symbols seems to be possible suspects. I would just write "_2" instead of <2>, but it might be the spectre syntax.

  • Andrew Beckett
    in reply to ZoltanT

    Check what outputs() returns compared with outputs(?map nil) which will show the raw simulator names. You could compare the two by doing:

    foreach(mapcar (sch sim) outputs() outputs(?map nil) list(sch sim))

    which will give you a list with both. I'm a bit surprised the name doesn't work if it's in the outputs() list. Are you doing v("/XI33<2>/abc/net5" ?result 'tran) ? Note you can't just omit the initial slash because that will mean it's expecting a netlist name and then the hierarchy separator is dot - the outputs(?map nil) will tell you the raw names you can use instead.

    A few other questions:

    1. Which IC subversion (getVersion(t) will tell you) and spectre subversion are you using (the simulator log file would tell you that)?
    2. In ADE what output format do you have in Outputs->Save All. Pick psfxl if you can rather than sst2.
    3. Is this a schematic-based simulator or are you simulating post-layout? If so, how are you including the post-layout netlist? (extracted view? DSPF somehow?)

    Regards,

    Andrew.

  • Freddyyyyyyy
    in reply to Andrew Beckett

    Thank you Andrew. It works now.

    Yes I used v("/XI33<2>/abc/net5" ?result 'tran) before. As I try your suggestion, the net name returns in outputs(?map nil) is XI33\\<2\\>\\/abc\\/net5, and v("XI33\\<2\\>\\/abc\\/net5") can work.

Reply
  • Freddyyyyyyy
    in reply to Andrew Beckett

    Thank you Andrew. It works now.

    Yes I used v("/XI33<2>/abc/net5" ?result 'tran) before. As I try your suggestion, the net name returns in outputs(?map nil) is XI33\\<2\\>\\/abc\\/net5, and v("XI33\\<2\\>\\/abc\\/net5") can work.

Children
  • Andrew Beckett
    in reply to Freddyyyyyyy

    That's a bit strange - not sure why you're having names with embedded slashes - I've only see that if the design was an extracted view or file from some non-Cadence extractor. If it's not that, please contact customer support so that we can investigate why this is happening.

    Regards,

    Andrew.

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