Porting Schematic from one voltage domain to other

Hi Utkarsh Arora,

In order for you to achieve this migration successfully, not only you need to swap the devices but you also have to update some parameters, for example of you want to keep a constant W/L ration from the 1.5V to the 1.8V domains than you need to recalculate the params for each device. When you update parameters, you must also trigger the underlying callbacks. Transistors are fairly easy to port, however when you posr resistors and capacitors, you have also to deal with extra/missing pins, device default orientations ...etc.

All of this would require you to build an automation that involves many parts to deal with I just mentioned. There are some scripts that are already available on Cadence's website, you can build on them. here is what you need for starters:

1. How can I replace specific cells with other specific cells in my design cellview using SKILL?
2. How can I update instance properties in a schematic using SKILL?
3. How to call CDF callbacks procedurally from SKILL to update CDF parameters?

Let me know if you need more specifics.

Cheers,

Riad @feb22eda

Hi Riad,

Thanks a lot for the reply. Actually my requirement is a little different, So for now Let us imagine that Mostype is the only thing that we should change. Now the above code changes all the nmos to nmos44 for example, but it should only change the Nmos type if any of its terminal is connecting to a VDD180 supply, If the nmos is connected to VDD only than it should not be change.

Sorry for not being very clear the first time.

Thanks

Utkarsh

Hi Utkarsh,

OK, understood. In this case, you need first to write a function that grabs the devices of interest, i.e. that match the name and connectivity criteria then call the update functions I mentioned earlier. I have written a procedure that can help you grab those device please check it out @ FTTgetDevicesConnectedToNet.il

Cheers,

Riad

Thankyou Riad,

Above script gives the devices connected to any net, So this would change the devices that are connected to VDD180 as in my situation here. Not let us take an example of the below schematic. According to the above procedure it will change the device A and D , How would I be able to find the devices B and C(It is a dummy schematic, It might have series of resistance and capacitance in between)

Thanks

Utkarsh

Hi Utkaresh,

I'm not sure I understood ... If you run the procedure as following (Change libName/cellName for the actual names):

FTTgetDevicesConnectedToNet('("libName" "cellName") "VDD180")

The above command will only get MOS A as it is the only one which has a pin directly connected to VDD180, and probably B as well if its bulk is connected tp VDD180. It won't change device D though. Anyways, I'm not sure I understand what you actually mean. The best way is for you to lay out a clear spec instead of feeding bits and pieces of information over time, it's easier to put down a clear spec of the criteria of what/when you want to change a device. 

Riad

Riad,

Sorry for feeding the information in bits. I want to extract the C and D device and change them only if my A device is connected to VDD180 not VDD150, because my original fet works properly in VDD150 domain. I think you got it now.

Utkarsh

What about device B? What if you have transistors A, B, C, D, E, F, all stacked between VDD180 and GND, which ones would you change to the 1.5V ? 

I have to change them to a higher voltage. So if all are stacked between VDD150 and GND all fets need to be changed to a new flavor that supports VDD180.

In this case you have to adapt the SKILL code I shared and trace the stack down from VDD to VSS, keep track of all transistors in a list then perform the changes on those transistors only. Again the idea is to build your own code that first collects the transistors that fit the change criteria then apply the changes. The SKILL codes I provided should be sufficient. 

Ok
This net tracing needs to be done, I thought may be cadence have a easier solution for this. Thanks Riad by the way.

Utkarsh

You probably want to check out Power Verification solutions but I have no experience with them. Look at https://community.cadence.com/cadence_blogs_8/b/ms/posts/verifying-power-intent-in-analog-and-mixed-signal-designs-using-formal-method

You probably want to check out Power Verification solutions but I have no experience with them. Look at https://community.cadence.com/cadence_blogs_8/b/ms/posts/verifying-power-intent-in-analog-and-mixed-signal-designs-using-formal-method

Okay Riad, will have a look. Thanks