AMS Unified Netlister problem with multiple digital modules w/o cell views

hello experts,

my AMS cosim setup working fine with OSSNetlister although it's obsoleting so I have to move forward to UnlNetlister. my analog top level test bench has some analog blocks simulating with a digital design which contains several digital sub-blocks(e.g., digital and digital.sub1, digital.sub2, digital.sub3...) . The generated netlist is used like this:

                     xrun -f xrunArgs

          where xrunArgs has "./netlist.vams" and "-f ./textInputs"

the difference between obsoleting OSSNetlister and recommended UnlNetlister is, 

   OSSNetlister only mention (system)verilog files in "textInputs" like bellow so the simulator can dig up all the digital modules within it even those sub digital blocks don't have any cell views.

                                  ${IC_INVOKE_DIR}/lib/dig_top/systemVerilog/verilog.sv                     

  well, UnlNetlister  specifies one (system)verilog file is only for specific cell view in "textInputs". e.g.,

                                   -amscompilefile "file:${IC_INVOKE_DIR}/lib/dig_top/systemVerilog/verilog.sv lib:lib cell:dig_top view:systemVerilog"

so with UnlNetlister, the simulator complains sub digital blocks are unfound / unresolved.

     xmelab: *E,CUVMUR (.../lib/dig_top/systemVerilog/verilog.sv,2537|9): instance 'tb.analog@ana<module>.u_dig_top@dig_top<module>.u_sub1' of design unit 'sub1' is unresolved in 'lib.dig_top:systemVerilog'.

is there a way to tell UnlNetlister there single (system)verilog file could have multiple digital modules? hope I don't have to make a cadence cell view for each digital sub blocks which is very tedious and unnecessary.

thanks,

David