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Can we use design variables inside the name of output expressions in Assembler?

ayayla

Hi,

I have different operation modes in my design so I need to sweep design variables. I was trying to use one of these design variables inside output name with VAR() but it seems that name region is treated as string since VAR() function is not evaluated as below.

Is it possible to construct the output expressions with design variables in Assembler?

Thanks

yayla

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  • Andrew Beckett

    Yayla,

    You've not provided enough information here - I don't know what your expression is, or what's wrong. What "name region" are you talking about? Which version are you using? The screenshot doesn't really help...

    Andrew

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  • Andrew Beckett

    Yayla,

    You've not provided enough information here - I don't know what your expression is, or what's wrong. What "name region" are you talking about? Which version are you using? The screenshot doesn't really help...

    Andrew

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