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How to include CDL file at one time?

I used ARM digital standard cell library in Virtuoso. Every time when I do LVS in Calibre, I have to export the netlist firstly from schematic and then include CDL to Spice Files. If I did some changes, I have to repeat the whole process, which is annoying. Is there any method to include the CDL file permanently. Then I just need to set it one time and it will automatically check the CDL file during LVS. Thanks!

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Andrew Beckett over 4 years ago

I think you're asking about the flow with Calibre, which is a Siemens EDA (formerly Mentor) tool, not a Cadence tool. The flow with Calibre (even when running in Virtuoso) is something that it would be better to ask Siemens EDA about (or an equivalent forum there).

Andrew
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NoToday over 4 years ago in reply to Andrew Beckett

Thanks Andrew! Yeah, you are right.
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NoToday over 4 years ago in reply to Andrew Beckett

Thanks Andrew! Yeah, you are right.
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