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Assura DRC for Dummy Fill Generation

yogibole

I'm trying to generate auto-fill patterns using Assura DRC.

Below is the sequence that I'm thing about:

1. scan the whole chip and divide up into pieces.
    1) find the rectangluar spaces that can fit widest x-dimension and generate a layer for it.
    2) find the next largest spaces that can fit rectangles with 2nd-widest x-dimension and generante a layer for it.
    3) repeat 1) and 2) until no space is left unassigned.
2. Fill in the generated layers

Step 2 can be done with Assura commands. But my difficulty is in step 1.

To explain more about Step 1:

The area I want to fill is at the periphery of the chip:

1) two rectangular areas with long in x-dim at the top and bottom.

2) two tall rectangular areas on the left/right (long in y-dim).

(the real case has a bit more complexity but this can be a good simplification)

I think I will step through the whole chip area and find these areas and generate layers for them, which will be filled in Step 2.

But the difficulty is that the stepping window size should be variable to find the areas of varying sizes.

Any help on this will be appreciated.

Thank you.

Parents

  • Probably best to discuss this with customer support (I can only give a quick answer here - maybe others can help though), but the first step would be to read the various approaches for doing fill covered in the Assura Physical Verification Developers Guide. Either find that on Cadence Online Support, or in cdnshelp or simply at $ASSURAHOME/doc/assuraref/assuraref.pdf (search for "fill").

    Andrew

  • in reply to Andrew Beckett

    Thank you, Andrew for your comment.

    I will ask customer support. But I will still appreciate any answers from other users here.

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