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Project creation recommendation help, creating a dynamic padframe generation tool.

dandadom

Hello, I understand this is not a closed ended question, but I would like to avoid wasting time, and I am hoping someone much more experienced can make a recommendation on where to start.

My goal with this project is to create a tool to generate padframes from an existing padframe library I have been given access to. The idea is to prompt the user to enter some parameters (exterior dimensions, number of pins, pin types, etc.) and for it to spit out a schematic that is tied with a layout. This is kind of an unorthodox first experience with cadence, but I come from a PCB background in Altium so I think I understand the general process behind creating a schematic, and then creating a layout from that schematic; I just have never done any automation like this before, and would really appreciate if I could get a pointer on where to start.

My original idea was to use PCell designer, but unfortunately my license does not permit me to use that, so I assume I will have to learn SKILL. Is SKILL an appropriate tool to use for this? Or would I be better of starting elsewhere. Also for any recommendations is there a good corresponding course in the Cadence support library I can learn from?

I appreciate any input and apologize again for such an open ended question.

Thank you,

Dominik

  • Hi Dominik,

    I think Skill is the write tool for this purpose although, digital tools can generate for you the padFrame, but you will need license too for this tools.

    I made a kind-off script like that loOong time ago, but so baddly written that i fear to share it with you.

    You will also have to create a symbol of you padFrame.

    You will need functions like dbOpenCellViewByType dbTransformBBox dbCreateInst

    Depending on PDK, you will need to create pins or label : leCreatePin dbCreateLabel

    If you want some kind of generic function to be insensitive to pdk, you will still need to guess the passivation layer (sometimes called pad or ap or so.) and a function to find the bBox of this layer to be sure the LVS from the bounding pad to the inner circuit will 'short'. leGetValidLayerList(techGetTechFile(geGetWindowCellView()))  ;<= could help.

    Once i tried to create strechable spacer to avoid using multiple size fillers between pads. But you will need to create a correct DRC-free streachable spacer (not so easy).

    Since it will have a width parameter, you will need to import it with dbCreateParamInstByMasterName() function.

    To create symbol pins you will have to use schCreateSymbolPin()  and schCreatePin  schCreateSymbolShape schCreateSymbolLabel dbCreateRect  functions.

    And obviously, you will have to use functions like rodSubPoints  dbTransformPoint  dbConcatTransform rodSubPoints rodAddPoints to name a few.

    And yes cadence online (or onsite) training will be profitable to you.

    Here are my advice and a few hints.

    Last bonus idea, instead of asking the user to prompt number of pins, types etc. You can propose pins from an existing schematic where you can find the pins, if they are in/outs . But indeed, for power densities, usually you add multiple GND and Power pins.

    Hope it helps,

    Regards,

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