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using command ncverilog cause hang issue

Jack Lee
Hi, I am Jack.I have something to verify about the ncverilog command.

I write the ncverilog command to compile and simulate my design:ncverilog   abc_tb.v -f abc_tb.f -l abc_tb.log  +ncelabargs+"-timescale 1ps/1ps" +access+rw(abc_tb.f is the filelist which contains all files required for this design) I face hanging issue while running simulation, when I remove the option +access+rw, the hang issue can be avoided.Why this can be happened?I have tried out with other tools like VCS, I have not experienced this type of issue, thanks for giving me some advices.
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  •  Hi Inan,

    It's hard to pinpoint the problem given what you are seeing with the simulation.  At this point I would encourage you to do the following:

    1)  make sure that you are using the latest subversion for the version of the IUS simulator being used.  You should also check with Synopsys to see if there is a more recent version of the stil pli.

    2)  Once you've determined that you are using the latest tools and you are continuing to see the problem start peeling away layers of items to see if the problem can be pinpointed.  Remove sdf annotation if that is being included with the sim.  What command line options are being used?  If at all possible remove the pli from the simulation.  If that is not possible try to zero out the function calls within the veriuser.c file and recreate the libpli.so.

    3)  open up a service request with Cadence customer support (support@cadence.com) as well as Synopsys support.

    Best regards,

    Mickey

Reply

  •  Hi Inan,

    It's hard to pinpoint the problem given what you are seeing with the simulation.  At this point I would encourage you to do the following:

    1)  make sure that you are using the latest subversion for the version of the IUS simulator being used.  You should also check with Synopsys to see if there is a more recent version of the stil pli.

    2)  Once you've determined that you are using the latest tools and you are continuing to see the problem start peeling away layers of items to see if the problem can be pinpointed.  Remove sdf annotation if that is being included with the sim.  What command line options are being used?  If at all possible remove the pli from the simulation.  If that is not possible try to zero out the function calls within the veriuser.c file and recreate the libpli.so.

    3)  open up a service request with Cadence customer support (support@cadence.com) as well as Synopsys support.

    Best regards,

    Mickey

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