Stats

  • Locked Locked
  • Replies 1
  • Subscribers 49
  • Views 15015
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

JK Flip-Flop Error

laboredm

I have a circuit that has a JK Flip-Flop in it and it will not toggle like the truth table tells me that it should.  I have Orcad 16.0.0.p001.  Is there an error in this edition?  How do I fix the flip-flop errror?

  • Just a guess but my bet is that the outputs are "unknown", or "X", Check the Simulation Profile, Options tab, pick "Gate-level Simulation" in category, set the list for "Initialize all flip-flops to" "0" or "1", thie will set the flip-flop to a determinate state. Alternately ensure that you flip-flop correctly executes a "reset" before you start looking for toggling.

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.