How can we find all test vectors for a given stuck-at faults? One way is ofcourse, exhaustive verilog simulation wih all possible input vectors. But that quickly becomes impracticalas the number of input pins increase. I want to find all the test vectors corresponding to a stuck-at fault in a 32-bit adder, say for example. Reason is that if I know all test vectors, I can perform boolean minimization and come up with a boolean formula in SOP form. That formula would then model the stuck-at fault. I need not run verilog again and again - just checking if a given input vector satisfies the formula, would do the job. PODEM based tools generate one or a set of test vectors that detect a set if faults. So they won't help. Any siggestion?