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  3. ncsim, saif files and verilog 2d registers/memories

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ncsim, saif files and verilog 2d registers/memories

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archive over 17 years ago

Hi all,

I have a 4kb memory unit in my design which is the biggest unit in my design. I need to get switching activity from my whole design including the 2d registers/memory so I could perform power estimation.

Ncsim saif generation program (in Version 5.5 or greater) works great but it uses vcds as an intermediate to output final backward saif file. As far as I know, you can't monitor verilog memories using vcds :( Therefore, the final backward saif file doesn't include switching data from my verilog memory.

Has anyone found a way around this? Or has any ideas?

Thanks,
Wasay


Originally posted in cdnusers.org by vex_helix
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