I want to do some simulations to find design parameters for an OTA . This is for implementing an OTA based active second order low pass filer, to be used in a high speed wide bandwidth PLL So the OTA should have: high output impedance. should be able to drive a capacitor of about 10-20 pF. should have a large input range Are there some ideal models available from which I could find the gain bandwidth product, slew rate and gain? Can someone help me understand what should be the design considerations and how the simulations can be done?

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Simulation of OTA with high input range and load drive capacity to obtain design parameters

I want to do some simulations to find design parameters for an OTA .
This is for implementing an OTA based active second order low pass filer, to be used in a high speed wide bandwidth PLL

So the OTA should have:

high output impedance.
should be able to drive a capacitor of about 10-20 pF.
should have a large input range

Are there some ideal models available from which I could find the gain bandwidth product, slew rate and gain? Can someone help me understand what should be the design considerations and how the simulations can be done?

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