Has any body tried the design reuse using concept hdl l.. i could do the same using design entry CIS...
After generating the create module from pcb...from where will we get the generate reuse model from hdl editor?. Can anybody present me the procedure of design reuse in HDL L
Have a look at the tutorials, specifically "Design Entry HDL Reuse". This talks you through front to back reuse using HDL. These are found under start - all programs - cadence version - tutorials.
You could also look at http://www.cadence.com/rl/Resources/conference_papers/stp_cdnlivesv2006_bartley.pdf