I am a freshman in SI field. Now I am simulating the signals between an ARM9 processor and 133M SDRAMs. Now, the biggest problem I have to solve is to determine the overshoot limitation. I list the values in the ABSOLUTE MAXIMUM RATINGS section of the SDRAM's and processor's datasheet in the following table.
SDRAM Voltage on any pin relative to Vss -1.0 - 4.6 V
Processor DC I/O voltage -0.5-4.8V
Can I use –0.5 - 4.6V as the overshoot falling/rising parameters?
Chenli:It looks like you can use -1V to 4.6v for the SDRAM.For the processor, these are MAX DC voltage specs so you can usually go a little higher during overshoot/undershoot. Take a look at a Freescale processor data sheet. They define AC overshoot specs very clearly. However, a greater than 1V undershoot or overshoot can be an issue for EMI, ground/power noise, etc. but putting in a whole bunch of source terminations can be an issue for board density and cost. You will have to make the tradeoff. Another way to check is to see from the IBIS file buffer where the ground and power clamps start conducting. You can usually go about 500mV - 1000mV over this as long as it is for less than 10% of the clock cycle.
Kai,Thank you for your advice!Happy new year!Chenli