Hello all.3 GND layers: 3, 7 and 11. I want a via to be connected on 3 and 11 but not on 7.using negative shapes.I edit the padstack and change l7gnd "thermal relief"definition from (circle, thermal flash thr_25 size 35) by removing flash thr_25 and keeping circle size 35.The artwork then fails saying: PADSTACKS MISSING THERMAL/ANTIPAD DEFINITIONS: VIA_TEST
... error in film, proceed to next! *** ERROR with l7gnd.art
------------------------------------------------------ SUMMARY: *** ERROR with l7gnd.artDoes pad definition really need a flash in thermal relief definition?It can't be empty?I sometime did the reverse by putting a thermal definition in the antipad to graphically connecting a pad (without any schematic logic). This works well...Thanks in advance.
you can try to edit the Via PadStack and change the thermal flash in I7gnd layer, make it small than the drill size. then nothing in this layer.By the way, I think the good solution is to use the B/B via, Top-3, and Bottom-11.
hi, leonleeI don't think the smaller flash works.I tryed in that way,and i created the artwork of that layer.When I imported it into the CAM350, i found the pad used in that layer was the smaller flash.Compared with the other really unconnected via,whose pad in that layer was the Anti-Pad, the pad we concerned was not succedssfully seperated form the layer.Soooooo,I still wonder how to disconnect a via and a layer in same net.Kepei,tranfa
Don't know what can be done by editing the padstack, but what I've done is use an anti-etch line on the specific layer (shapes don't seem to work). This is an arc'd line that circles around the via center with a width such that the inside edges overlap and the outside edges are the diameter of the anti-pad you want. Only problem is if you ever move or delete that via you also need to remember to move/delete the anti-etch line.
Hello Randy,Once more,I don't think the circle formed by the anti-etch works in a neg layer.In official document, this kind of anti-etch is not surported in a neg layer.I think this puzzle worth disscussing.So anyone familiar with the process of the manufacturing of PCB come up to solve the Sphenx?
What's about using positive layers?So you can add "no_shape_connect" to the via and it will be voided on all layers.To connect this via on a specific layer, just use a cline large enought to fill the void.But i do have any idea with negative layers.