i want to divide the o/p freq of Quad-VCO i.e. 4.8 GHz into 2.4 GHz. for this purpose i need a freq divider ckt.
i saw the freq divider from RF library in cadence. it is containing 4 pins (pin, pout,nin, nout).
how to apply stimulus to this pins & check the o/p
i dont know what nout stands for here
pin might be i/p power, pout might be o/p power
nin might be divide no.
i have figured it out they are differential i/p & o/p pins
But when i try to open the block (by pressing q) in CDF parameter view i choose veriloga view & fill all the parameters such as n,VDD,VSS,nhi,dir,tt etc (i.e. all the parameters in the code) & try to simulate it by doing transient analysis then i am getting o/p as 0(straight line) on both the pins
Are there any changes while simulating the veriloga code or we cannot use that block in schematic view ??????
I have entered the Simulator stop view list as spectre veriloga ...........
Still its not working......
Thanks in advance......