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Plotting Vth

Shahnaf
Hi, I am designing rectifier for very low power applications using gate cross coupled architecture of MOSFETs. So, My input is ac voltage which is around 500mV and less. In order to simulate my design, I am trying to look around the ways to lower the Vth. To do so, I want to check how Vth is varying w.r.t Width of NMOS, PMOS and Length of NMOS, PMOS. How should I plot Vth vs L or W in case of ac input? Suppose, i give some biasing to gate voltage by using some voltage source, at that time, how should I plot Vth? Please help me out as I am very confused. Thanks, Shahnaz.
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  • Thanks Andrew.

    I am doing transient analysis for the rectifier for very low power applications.

    I want to lower the Vth of the MOS and so I want to know Vth for different aspect ratio's.

    I will try the method suggested by you once I am in lab.

    If no success, I will post further details.

     

    Thanks & regards,

    Shahnaz. 

Reply

  • Thanks Andrew.

    I am doing transient analysis for the rectifier for very low power applications.

    I want to lower the Vth of the MOS and so I want to know Vth for different aspect ratio's.

    I will try the method suggested by you once I am in lab.

    If no success, I will post further details.

     

    Thanks & regards,

    Shahnaz. 

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