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Plotting Vth

Shahnaf
Hi, I am designing rectifier for very low power applications using gate cross coupled architecture of MOSFETs. So, My input is ac voltage which is around 500mV and less. In order to simulate my design, I am trying to look around the ways to lower the Vth. To do so, I want to check how Vth is varying w.r.t Width of NMOS, PMOS and Length of NMOS, PMOS. How should I plot Vth vs L or W in case of ac input? Suppose, i give some biasing to gate voltage by using some voltage source, at that time, how should I plot Vth? Please help me out as I am very confused. Thanks, Shahnaz.
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  • In response to your points:

    1. The chances are that you either got the names wrong, or the transistors which are missing are subckt models and so the devices are not at the level you thought they were - you will need to investigate (hard for me to tell without seeing the data)
    2. I wouldn't expect to see operating point data in an ac simulation result. That's because the operating point data doesn't vary in an ac sweep normally - the ac analysis is a small-signal analysis around an operating point, and it's the operating point which will vary. You'd have to do a dc operating point or a dc sweep to see the effect.

    Regards,

    Andrew.

Reply

  • In response to your points:

    1. The chances are that you either got the names wrong, or the transistors which are missing are subckt models and so the devices are not at the level you thought they were - you will need to investigate (hard for me to tell without seeing the data)
    2. I wouldn't expect to see operating point data in an ac simulation result. That's because the operating point data doesn't vary in an ac sweep normally - the ac analysis is a small-signal analysis around an operating point, and it's the operating point which will vary. You'd have to do a dc operating point or a dc sweep to see the effect.

    Regards,

    Andrew.

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