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Different op amp gains using different spectre analysis

OneNewBoy
Hi all,

I am new to analog design. I have created an op-amp schematic and tried to get open loop gain by 2 ways:
(Simulation uses cadence virtuoso)

1) Transient analysis: applied a ramp pulse of 0->VDD to +ve input [with a dc value of VDD/2] and kept -ve input to Vdd/2, then plotted Vout vs V+ and took its derivative, this gave me 1300

2) DC analysis: applied a volt of 0->VDD at +ve volt and kept -ve input to VDD/2. Processed Vout as in step 1 and got ~ 50

I cannot believe what makes the 2 gains so different and which is correct ? Voltage supply is from 0->VDD.

Can someone help in this regard ?
Thanks a lot

  • Hi

    When you do not have a feedback for a high gain amplifier, it is not possible to avoid saturation in the output. You need to have a DC feedback at least and then you can find the gain.

     

    Best

    Hamid 

  • Thanks for reply, However I am facing a very strange problem in my simulation, please help me with this:

    I am running a parametric simulation to experiment & get the optimal bias current of Op-Amp .

    For this I gave a list of "I_bias" as "5u 7u " in the parametric analysis window, and ran a parametric transient analysis with these 2 parameters

    Problem is the output I get with  7u in above parametric analysis is very different from the same value plugged directly in transient analysis.

    I figured out that if I remove 5u in the list of current values I pass in parametric analysis then the output of parametric analysis and transient analysis become same.

    I have never seen this difference before, is this related to some initial value problem ? [part of 5u solution getting used for 7u simulation ?]. Please help me in debugging this.

     

    Update: I figured out that if I do skipdc transient analysis, my results are okay as expected, what does that imply, the circuit's DC behaviour is not good ? And also skipdc takes much longer, what should be the most appropriate initial condition and how may I include them ? 

     Thanks a lot. 

  • Using skipdc is not a good idea - it means that the transient will have a much harder time converging.

    The behaviour you are seeing suggests that your circuit has more than one stable operating point.

    Andrew.

  • Thanks Andrew, I will play more with the circuit to dig more about this

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